An Enhanced Slew Rate Output Capacitor-free Low Dropout Regulator Based on Differential Transconductance Amplifier

A highly current-efficient and fast transient response capacitor-free low-dropout regulator (LDO) for Systemon-Chip (SoC) applications is presented in this paper. The proposed architecture is implemented using 0.35 μm CMOS technology. The proposed circuit is based on differential transconductance and push-pull amplifier. Common mode feedback (CMFB) resistors and direct voltage spike detection using RC high pass filter are used to enhance the slew rate at the gate of the output transistor. Loop bandwidth is extended by adaptive biasing. This greatly improves the LDO transient response while preserving high current-efficiency. The output is regulated at 1.2 V with dropout voltage of 200 mV and a maximum load of 125 mA. Simulation results showed that the lowest consumed quiescent current is approximately 8 μA with a voltage spike and recovery time of less than 260 mV and 0.5 μs.