CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development. CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversio...

This paper presents a linear multiplier that can be fully implemented in CMOS technology. The circuit implements the function of mathematical multiplication for the two input signals. Since this multiplier is not a conventional mixer, some unconventional methods were use, such as, to realize the function of multiplication, a translinear loop is implemented, which is based on the exponential rel...

The scaling of nanometer technology has had a major impact on the power dissipation of CMOS circuits. As transistor size decreases it has become apparent that leakage power is becoming a dominant fighting force against future technology. In this paper the importance of static power consumption on the design of new and advanced CMOS technology is explored with the investigation of leakage power ...

According to the Moore’s Law, the number of transistors in a unit chip area double every two years. But the existing technology of integrated circuit formation is posing limitations to this law. CMOS technology shows certain limitations as the device is reduced more and more in the nanometer regime out of which power dissipation is an important issue. FinFET is evolving to be a promising techno...

Power supply noise in three-dimensional integrated circuits (3-D ICs) considering scaled CMOS and through silicon via (TSV) technologies is the focus of this paper. A TSV and inductance aware cell-based 3-D power network model is proposed and evaluated. Constant TSV aspect ratio and constant TSV area penalty scaling, as two scenarios of TSV technology scaling, are discussed. A comparison of pow...

As quantum processors grow in complexity, attention is moving to the scaling prospects of entire computing system, including classical support hardware. Recent results high-fidelity control individual spins silicon, combined with demonstrations that these qubits can be manufactured a similar fashion field-effect transistors, create an opportunity leverage know-how complementary metal–oxide–semi...

A digital readout electronics scheme in CMOS technology is described for integration with micro-electro-mechanical (MEM) sensors on the same chip. The readout circuit is general in nature and can be employed with a variety of analog sensors. The presented scheme in CMOS technology is fully integrable with the multiple sensor outputs either in a chain or an array format and is capable of detecti...

The structures that can be implemented and the materials that are used in complementary metal-oxide semiconductor (CMOS) integrated circuit (IC) technology are optimized for electronic performance. However, they are also suitable for manipulating and detecting optical signals. In this paper, we show that while CMOS scaling trends are motivated by improved electronic performance, they are also c...