We numerically investigate the possibility of using Tunnel field-effect transistor (TFET) in a 32 kHz crystal oscillator circuit to reduce power consumption. A simulation using SPICE (Simulation Program with Integrated Circuit Emphasis) is carried out based on a conventional CMOS transistor model. It is shown that the power consumption of TFET is one-tenth that of conventional low-power CMOS.

In this paper, the electrical characteristics and sensitivity analysis of staggered type p-channel heterojunction electron-hole bilayer tunnel field effect transistor (HJ-EHBTFET) are thoroughly investigated via simulation study. The minimum lattice mismatch between InAs/GaAs0.1Sb0.9 layers besides low carrier effective mass of materials provides high probability ...

In this paper, the transient device performance analysis of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been evaluated. 3-D Bohm Quantum Potential (BQP) transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay prod...

The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing secondary path in whole-chip electrostatic discharge (ESD) protection network. In this paper, ESD characteristics of traditional point TFET, line TFET Ge-source are investigated using technology computer-aided design (TCAD) simulations, an improved TFET-based scheme proposed. It foun...

High leakage currents and short channel effects become significant enough to be the major concerns for circuit designers as semiconductor devices are miniaturized. Tunnel field effect transistor(TFET) show good scalability and have very low leakage current .These transistors have very low leakage current, good sub-threshold swing, improved short channel characteristics and lesser temperature se...

A hetero gate dielectric low band gap material DG Tunnel FET is presented here. The investigated device is almost free from short channel effects like DIBL and t V rolloff. Simulation of the device characteristics shows significant improvement over conventional double gate TFET when compared interms of on current, ambipolar current, roll-off, miller capacitance and, device delay time. Simulatio...

We discuss how to control dc Josephson current by influencing the structure and nonequilibrium population of Andreev levels via external electrostatic gates, current injection and electromagnetic radiation. In particular we will consider the ”giant” Josephson critical current in ”long” SIS tunnel junctions and the regular and anomalous nonequilibrium Josepson currents in three terminal SNS junc...

In this paper, a two-dimensional analytical model of laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting SiO2 and HfO2 is derived. The illustrates higher drive current better performance against hazardous SCEs HCEs in below 30 nm regime. Parabolic approximation method used here to construct channel potentials ...