This paper presents a Modified control method for Space Vector Modulated (SVM) Z Source inverters. Proposed algorithm provides a modified voltage vector with single stage controller having one degree of freedom wherein traditional controllers have two degrees of freedom. Through this method of control, the full utilization of the dc link input voltage and keeping the lowest voltage stress acros...

0026-2714/$ see front matter 2011 Elsevier Ltd. A doi:10.1016/j.microrel.2011.09.018 ⇑ Corresponding author. E-mail address: [email protected] (E.A. Douglas). AlGaN/GaN High Electron Mobility Transistors were found to exhibit a negative temperature dependence of the critical voltage (VCRI) for irreversible device degradation to occur during bias-stressing. At elevated temperatures, devices exhib...

The Conventional Boost Converters is not possible to obtain the high voltage gain. In this paper a DCDC boost converter is proposed for achieving high voltage gain and to reduce the harmonic content in the output side. The circuit diagram of the proposed converter is consists of coupled inductor. Therefore the voltage stress on the active switch is reduced due to the presence of the inductor an...

Conduction characteristics of amorphous InGaZnO thin-film transistors were investigated by applying constant drain current with gate bias (V GS) modulation. Constant drain current in the off-current (I off) level from the transfer characteristic was applied to the drain electrode and the measured drain voltage with the gate bias sweep. The normalized channel conductance (G d) characteristics we...

We performed constant voltage stresses with different bias conditions on all-organic complementary inverters. We found a 20% maximum variation of DC inverter parameters after a 10-s stress. However, the largest stress-induced degradation was found in the delay times, which increased by a factor as high as 7. This is mainly due to the threshold voltage variation of the p-type thin-film-transisto...

A new Schmitt trigger circuit, which consists of low-voltage devices, can receive the high-voltage signal without gate-oxide reliability problem, is proposed. The new proposed circuit, which can operate in a 3.3 V signal environment without suffering high-voltage gate-oxide stress, has been fabricated in a 0.13 μm 1/2.5 V CMOS process. The experimental results show that the measured transition ...

Abstract— This paper extends the traditional family of PWM DC-DC converters. By employing voltage capacitor-multipliers, converters provide high voltage gains. The capacitor multiplier of each converter is driven by the same transistor of the well-known basic topology. The main features of these new converters are: (i) high-voltage gain without extreme duty cycles and transformerless. Therefor...

HIGHLIGHTS Single-switch configuration for the proposed hybrid converter is employed. Static voltage gain of topology improved. Power switch subjected to low voltage-current stress. The power conversion efficiency

The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) are described. When the gate voltage is applied on top and bottom electrodes, the DG a-IGZO TFT showed an excellent electrical performance with the subthreshold swing of 99 mV/dec, the mobility of 15.1 cm/V·s and the on-off ratio of 10. U...

The piezoelectronic transistor (PET) has been proposed as a transduction device not subject to the voltage limits of field-effect transistors. The PET transduces voltage to stress, activating a facile insulator-metal transition, thereby achieving multigigahertz switching speeds, as predicted by modeling, at lower power than the comparable generation field effect transistor (FET). Here, the fabr...