As technology feature size is reduced, ESD becomes the dominant failure mode due to lower gate oxide breakdown voltage. In this paper, the effectiveness of new gate and substrate triggering techniques has been investigated to lower the trigger voltage of the LVTSCR and MOSFET based ESD protection circuits using 2D simulations and HBM/TLP measurements. The simulation results show that the using ...

GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) are promising for high-voltage power switching applications. A concern with this new device technology is oxide reliability under prolonged high-field and high-temperature conditions. This paper studies an important aspect of oxide reliability, time-dependent dielectric breakdown (TDDB) in GaN MIS-HEMTs. We have de...

The purpose of this paper is to present and discuss a general HV topology of the solid-state Marx modulator, for unipolar or bipolar generation connected with a step-up transformer to increase the output voltage applied to a resistive load. Due to the use of an output transformer, discussion about the reset of the transformer is made to guarantee zero average voltage applied to the primary. It ...

It has been shown that presenilin is involved in maintaining Ca2+ homeostasis in neurons, including regulating endoplasmic reticulum (ER) Ca2+ storage. From studies of primary cultures and cell lines, however, its role in stress-induced responses is still controversial. In the present study we analyzed the effects of presenilin mutations on membrane currents and synaptic functions in response t...

This paper proposes a diamond-shaped high step-up switched-capacitor based basic multilevel inverter topology. The (SC) stage consists of 2 active switches, diodes, and capacitors. Using single DC source with the unfolding circuit (10 5 capacitors, diodes) results in production 17 voltage-steps at output gain up to 8 times input voltage. By extending stages, higher voltage levels gains can be p...

This work presents a novel highly efficient and low-stress battery charger with a resonant switch converter— based on resonance and zero-voltage-transition soft-switching theory—that reduces defects associated with high voltage and high current stresses caused by the resonance of traditional resonant circuits. The novel battery charger meets the requirement that all circuit components must oper...

A new passive Power Factor Corrector (PFC) based on Valley Fill (VF) is proposed for an off-line Flyback converter. By adding an extra winding which is magnetically coupled to the Flyback transformer and electrically coupled to the VF, higher Power Factor (PF) and lower Total Harmonic Distortion (THD) can be achieved. The proposed circuit uses a high frequency inductor, low voltage capacitors t...

Based on the combination of a three-phase diode bridge and a dc/dc boost converter, a new three-phase threeswitch three-level pulsewidth modulated (PWM) rectifier system is developed. It can be characterized by sinusoidal mains current consumption, controlled output voltage, and low-blocking voltage stress on the power transistors. The application could be, e.g., for feeding the dc link of a te...

In all multilevel topology with several DC link, the voltage balancing problem of DC capacitors is a key problem. This paper proposes a new topology of chopper circuit for dc capacitor voltage balancing in diode clamped multilevel inverters (DCMLI). In the presented topology the number of switches is reduced respect to other proposed topology in literatures. Suggested topology is modular and ha...

This paper concerns the design, implementation and subsequent experimental validation of a low-voltage analog CMOS switch based on a gate-bootstrapped method. The main part of the proposed circuit is a new low-voltage and low-stress CMOS clock voltage doubler. Through the use of a dummy switch, the charge injection induced by the bootstrapped switch is greatly reduced resulting in improved samp...