Energy Efficient Tri-State CNFET Ternary Logic Gates

Power consumption and especially leakage power are the main concerns of nano MOSFET technology. On other hand, binary circuits face a huge number interconnection wires, which results in dissipation area. Researchers introduced emerging nanodevices multiple-valued logic (MVL) as two feasible solutions to overcome challenges mentioned above. Carbon nanotube field-effect transistor (CNFET) is one technologies that has some unique properties advantages over MOSFET, such adjusting carbon (CNT) diameters have desired threshold voltage same mobility P-FET N-FET transistors. In this paper, we present novel method for designing ternary based on CNFETs. Each our designed implements function its complementary via control signal. Also, these high impedance state, saves while not use. Moreover, two-digit adder/ subtractor power-efficient arithmetic unit (ALU) proposed gates. The simulated using HSPICE standard 32 nm CNFET simulation indicate designs’ correct operation under different process, voltage, temperature (PVT) variations. show gates 12X 5X lower power-delay product (PDP), respectively, compared previous designs.