In our research of architectural template, called network on chip architecture, for developing large and complex systems on a single chip, we introduced the implementation of 2D mesh topological structure. The architecture supports physical level and architectural level design integration. Basic communication mechanism between resources is envisioned to be packet switched message passing throug...

System-on-Chip (SoC) is a paradigm for designing today’s integrated circuit (IC) chips that puts an entire system onto a single silicon floor (instead of printed circuit boards containing a number of chips accomplishing the system task). With the increasing number of cores integrated on such a chip, on-chip communication efficiency has become one of the key factors in determining the overall sy...

In this supplementary document, we first show how disparities relate to the 3D planes used in our representation. Next, we provide an illustration of the sampled displets for a single test image and visualize the influence of the displets with respect to the associated superpixels. For reproducibility, we also list the learned parameter settings which we used throughout all our experiments and ...

Extracellular renal interstitial (RI) cGMP modulates NO- and pressure-induced natriuresis in vivo in the rat. The present study objective was to test the hypothesis that an intact microtubulin network is required for transport of cGMP from intracellular sites into the extracellular compartment in vivo and that this transport is required for natriuresis induced by NO and increased renal perfusio...

AIM Evaluation of the diagnostic contribution of color duplex sonography of the temporal, carotid and vertebral arteries and doppler sonography of the periorbital arteries in patients with and without giant cell arteries (GCA) particularly to distinguish between arteritic and nonarteritic neuro-ophthalmological vascular complications (NOC). METHODS In a prospective study ultrasonographic find...

In this paper we describe a quantitative evaluation of the performance of three dual-energy noise reduction algorithms: Kalender's correlated noise reduction (KCNR), noise clipping (NOC), and edge-predictive adaptive smoothing (EPAS). These algorithms were compared to a simple smoothing filter approach, using the variance and noise power spectrum measurements of the residual noise in dual-energ...

Abstract A few decades ago, communication inside the chip is done by transferring signals between cores. This conventional method not worthy because of increase in latency and power consumption. To rectify this issue Network-on-Chip (NoC) technology has emerged. NoC invented to transfer data packets instead signals. Machine Learning (M/LNoC) a very fast-growing today’s Integrated Circuit world ...

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions—one with ever-increasing connection density for better accuracy and other more compact sizing energy efficiency. The increase increases on-chip data movement, which makes efficient communication a critical function DNN accelerator. contribution this work is threefold. First...