T h e throughput of pipelined processors suf fers due t o delays associated wi th ins t ruc t ion dependencies and m e m o r y latencies . Multithreaded architectures t r y t o tolerate such delays by sharing t h e pipeline wi th independent ins t ruc t ion threads. T h i s paper proposes a n analyt ic model which i s used t o quant i tate t h e advantage of multithreaded architectures. T h e a...