Abslrucb-New CMOS differential logic circuits, callsd asynchronous latched CMOS differential logic (ALCDL) circuits, are proposed and analyzed. The ALCDL can implement a complex function in a single gate and achieve high operation speed without dc power dissipation. New CMOS differential latches, which can be used to prevent extra transitions and reduce the power dissipation, are also proposed....

Final goal of the project FATAL is a simulation model which considers radiation induced effects, like single event transients (SETs) and single event upsets (SEUs), in asynchronous logic. Using this model, it will be possible to develop a design and simulation framework for designing radiation tolerant asynchronous logic. For synchronous logic such frameworks are already available. Synchronous ...

In present paper, I propose a method for resolving the timing delays for output signals from an asynchronous sequential system. It will be used an example of an asynchronous sequential system that will set up an output signal when an input signal will be set up. The width of the output signal depends on the input signal width, and in this case it is very short. There are many synthesis methods,...

Fault diagnosis of composite asynchronous sequential machines with parallel composition is addressed in this paper. An adversarial input can infiltrate one of two submachines comprising the composite asynchronous machine, causing an unauthorized state transition. The objective is to characterize the condition under which the controller can diagnose any fault occurrence. Two control configuratio...

In present paper, I propose a method for resolving the timing delays for output signals from an asynchronous sequential system. It will be used an example of an asynchronous sequential system that will set up an output signal when an input signal will be set up. The width of the output signal depends on the input signal width, and in this case it is very short. There are many synthesis methods,...

Abstracr-In this paper, an efficient algorithm and its implementation ENCORE are presented for finding approximate solutions to dichotomy-based constrained encoding, a problem fundamental to the synthesis of combinational logic circuits, and synchronous and asynchronous sequential circuits. ENCORE adopts a greedy strategy to find an encoding bit by bit, and then uses an iterative method to impr...

Data mining is becoming an increasingly important tool to transform enormous data into useful information. Mining periodic patterns in temporal dataset plays an important role in data mining and knowledge discovery tasks. This paper presents, design and development of software for sequential pattern mining for asynchronous periodic patterns in temporal database. Comparative study of various alg...

This paper addresses an alternative approach to detecting the completion of computation in asynchronous digital circuits. Presented method, as the name suggests, is based on sensing the amount of current drawn by the combinatorial logic and exploits the behavior of CMOS logic gates for separating the computation state from the idle state. The paper deals with the current sensor design, its impl...