A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experi...

This paper presents a method of mitigating the transient overshoots of dc–dc converters undergoing large load disturbances. The method involves a small power auxiliary circuit which exists as an energy buffer to provide a smooth absorption and release of excess energy from and to the main dc–dc converter during transients. In the method, the regulation of the current magnitude of the converter ...

The Global System for Mobile Communications (GSM) Phase 2+ standard specifies a new type of packet data service called General Packet Radio Service (GPRS). GPRS allows the dynamic allocation of bandwidth resources. Wireless channels are allocated to a mobile terminal based on its traffic demands. Thus results in better resource utilization compared to the circuit-based data services. In general...

This thesis presents the design, analysis, and experimental results of a circuit to be used as a position sensor for microfabricated electric motors. The circuit is designed to measure the capacitance between the rotor blades and sensor electrodes implanted into the substrate beneath the rotor. This capacitance typically varies between five and fifteen femtofarads as the rotor turns. Analytic a...

We discuss the design of energy-efficient pipelines for asynchronous VLSI architectures. To maximize throughput in asyn-chronous pipelines it is often necessary to insert buffer stages, increasing the energy overhead. Instead of optimizing pipelines for minimum energy or maximum throughput, we consider a joint energy-time metric of the form ¼ is the energy per operation and ½ is the time per op...

In this research work, a copper bismuth oxide- (CuBi2O4-) based thin-film solar cell has been proposed for the lead and toxic-free (Al/ITO/TiO2/CuBi2O4/Mo) structure simulated in SCAPS-1D software. The main aim of work to make an ecofriendly highly efficient cell. absorber layer CuBi2O4, buffer TiO2, electron transport (ETL) ITO have used simulation. performance suggested photovoltaic devices w...

We report the performance of polythiophene/fullerene solar cells with a hole-collecting buffer layer that was made using composite films of functionalized multi-walled carbon nanotube (f-MWCNT) and poly(3,4ethylenedioxythiphene):poly(styrenesulfonate) (PEDOT:PSS). The MWCNT was functionalized with carboxyl groups to bestow solubility in a weak base solvent for mixing with PEDOT:PSS. Results sho...

Next-generation SONET/SDH technologies namely, Generic Framing Procedure (GFP), Virtual Concatenation (VCAT) and Link Capacity Adjustment Scheme (LCAS) enable network operators to provide integrated data and voice services over their legacy SONET/SDH infrastructure to generate new revenue. Data packets are encapsulated using framing protocols GFP. VCAT is a process of distributing the GFP frame...

AMULET3 is a fully asynchronous implementation of ARM architecture v4T and was designed at the University of Manchester between 1996 and 1998. It is the third generation asynchronous ARM, and is aimed at a significantly higher performance level than its predecessors. Achieving this higher performance has required significant enhancements to the internal micro-architecture, such as the introduct...

We discuss the design of energy-efficient pipelines for asynchronous VLSI architectures. To maximize throughput in asynchronous pipelines it is often necessary to insert buffer stages, increasing the energy overhead. Instead of optimizing pipelines for minimum energy or maximum throughput, we consider a joint energy-time metric of the form E , where E is the energy per operation and is the time...