Abstract Digital-to-analog converters are crucial building blocks for telecommunication applications. For this kind of applications, the traditional static performance requirements do not apply. The dynamic performance is of the greatest importance. This paper discusses the aspects of the performance of CMOS digital-to-analog converters and models the influence of non-idealities of circuit comp...

A CMOS image sensor with pixel level analog to digital conversion is presented. Each 13.8μm x 13.8μm pixel area contains a photodiode and a dynamic comparator using the maximum voltage swing available (0V 1.8V). The comparator does not need any bias current and is insensitive to fabrication process variations. Also a digital to analog converter (DAC) is used to deliver a voltage reference in or...

Flies are capable of rapidly detecting and integrating visual motion information in behaviorly-relevant ways. The first stage of visual motion processing in flies is a retinotopic array of functional units known as elementary motion detectors (EMDs). Several decades ago, Reichardt and colleagues developed a correlation-based model of motion detection that described the behavior of these neural ...

This paper presents a computer-aided design tool, IPRAIL, which automatically retargets existing analog layouts for technology migration and new specifications. The reuse-based methodology adopted in IPRAIL utilizes expert designer knowledge embedded in analog layouts. IPRAIL automatically extracts analog circuit and layout intellectual properties as templates, incorporates new technology desig...

Biological systems routinely perform computations, such as speech recognition and the calculation of visual motion, that baffle our most powerful computers. Analog very large-scale integrated (VLSI) technology allows us not only to study and simulate biological systems, but also to emulate them in designing artificial sensory systems. A methodology for building these systems in CMOS VLSI techno...

This paper presents a novel circuit architecture for implementing analog Turbo-style decoders in subthreshold CMOS with low supply voltage. Various analog Turbo decoding circuits have been demonstrated in recent years which require significantly less power and silicon area than digital circuits while providing high throughput. As CMOS process technologies improve, allowable supply voltages are ...

The recent explosion of interest in wireless personal communication systems motivates the development of fully integrated radio receivers. The parallel reduction of the dimension in CMOS technology, and hence higher levels of integration enables the combined integration of bandpass or baseband analog-to-digital converter along with the traditional front-end receiver building blocks. While this ...

In this paper a new CMOS current-mode four-quadrant analog multiplier and divider circuit based on squarer circuit is proposed. The dual translinear loop is the basic building block in realization scheme. Supply voltage is 3.3V. The major advantages of this multiplier are high speed, low power, high linearity and less dc offset error. The circuit is designed and simulated using HSPICE simulator...

We present a fully-integrated system for the detection and characterization of action potentials observed in extracellular neural recordings. The circuit includes an analog implementation of the nonlinear energy operator for spike detection. The minimum and maximum value of detected spikes are captured by peak detectors and digitized by an on-chip successive approximation ADC to provide a compa...