Due to fast growth of portable devices, power consumption and timing delays are the two important design parameters in high speed and low power VLSI design arena. In this paper we presents the comparison of single edge triggered static D flip-flop designs to show the benefit of power consumption ,delay and power delay product on the basis of area efficiency.

Power dissipation is a significant factor in the field of today’s electrical or electronic designing. The most promising substitute to these issues is the reversible computing. The reversible circuits do not dissipate energy as much as irreversible circuits. The reversible circuits do not lose information and can also produce unique outputs from the specific inputs and vice versa. So in the vie...

Diverse arrays of glutamate-gated channels in the spinal cord and associated pathways are partly responsible for sensory input, for altered sensitivity to peripheral stimuli during inflammation, and for generation of motor patterns. The expression of 16 genes, encoding all known subunits for the NMDA receptor (NR1, NR2A to NR2D), AMPA/low-affinity kainate (GluR-A to -D), high-affinity kainate i...

The massive and automated access to Web resources through robots has made it essential for Web service providers to make some conclusion about whether the "user" is a human or a robot. A Human Interaction Proof (HIP) like Completely Automated Public Turing test to tell Computers and Humans Apart (CAPTCHA) offers a way to make such a distinction. CAPTCHA is a reverse Turing test used by Web serv...

A high-frequency divide-by-256–271 programmable divider is presented with the improved timing of the multi-modulus divider structure and the high-speed embedded flip-flops. The D flip-flop and logic flip-flop are proposed by using a fast pipeline technique, which contains single-phase, edge-triggered, ratioed, and high-speed technologies. The circuits achieve high-speed by reducing the capaciti...

A high speed efficient TSPC flip-flop divide-by-16/17 dual modulus prescaler is proposed. The efficient (proposed) TSPC flip-flop with split path not only reduces the clock load and decrease power but also increases the speed of operation. The speed of the precaler can improve in two aspects. First is by adopting a new pseudo divide-by2/3 prescaler, the minimum working period is reduced by half...

The photochromic fluorescence switching of a fulgimide derivative was used to implement the first molecule-based D (delay) flip-flop device, which works based on the principles of sequential logic. The device operates exclusively with photonic signals and can be conveniently switched in repeated cycles.

According to the process scaling, radiation-hard devices are becoming sensitive to soft errors caused by Multiple Cell Upset (MCUs). In this paper, the parasitic bipolar effects are utilized to suppress MCUs of the radiation-hard dual-modular flip-flops. Device simulations reveal that a simultaneous flip of redundant latches is suppressed by storing opposite values instead of storing the same v...

According to Ray and Jan the cluster development in a spin glass can be described by calculating spin flip probabilities and by association of rarely flipping spins. We show