نتایج جستجو برای: depth chip level

تعداد نتایج: 1264735  

2016
Ivan Indutnyi Yuriy Ushenin Dirk Hegemann Marianne Vandenbossche Victor Myn'ko Mariia Lukaniuk Petro Shepeliavyi Andrii Korchovyi Roman Khrystosenko

The increase of the sensitivity of surface plasmon resonance (SPR) refractometers was studied experimentally by forming a periodic relief in the form of a grating with submicron period on the surface of the Au-coated chip. Periodic reliefs of different depths and spatial frequency were formed on the Au film surface using interference lithography and vacuum chalcogenide photoresists. Spatial fre...

Journal: :modares journal of medical sciences: pathobiology 2007
javad douzande mehrdad ravanshad manochehr rasouli farzaneh sabahi abdolvahab alborzi

objectives: human immunodeficiency virus type 1 is the causative agent of acquired immunodeficiency syndrome “aids” in human and demonstration of hiv-1 genome in samples is accepted as evidence of infection. transmission of infection during window period in blood transfusion settings is a world wide concern. also there is a need for a rapid, sensitive and accurate technique to detect hiv-1 infe...

Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. These wireless links are provided by wireless interfaces in wireless routers. The WiNoC archite...

2016
Bharati B. Sayankar Pankaj Agrawal

One of the most important role in many core system is played by Network on Chip (NoC). Researchers are recently focusing on the design and optimization of NoC. In this paper we describe the architecture of a tightly coupled NoC router. To improve the network performance the router uses the on-chip storage and to improve the use of on-chip resource and information, several optimizations are intr...

2006
Ralf M. Philipp Ralph Etienne-Cummings

A single chip containing two 128×128 pixel imagers and currentmode disparity computation circuitry is described. Previous stereo vision sensors have not integrated computation circuitry [1] on the focal plane, or been limited to single depth values [2]. The previous single-chip stereo imager [3] used continuous-time imaging and computation circuits. These circuits were non-linear, power hungry,...

2013
Ashok Kumar Sahoo Tanmaya Mohanty

Article history: Received January 1 2012 Received in revised format April 15 2013 Accepted April 15 2013 Available online April 15 2013 Cutting force and chip reduction coefficient is the important index of machinability as it determines the power consumption and amount of energy invested in machining actions. It is primarily influenced by process parameters like cutting speed, feed and depth o...

Journal: :Diving and hyperbaric medicine 2010
Benjamin Kuch Bernhard Koss Zeljko Dujic Giorgio Buttazzo Arne Sieber

We describe the development of a novel wrist-mounted apnea dive computer. The device is able to measure and display transcutaneous oxygen saturation, heart rate, plethysmographic pulse waveform, depth, time and temperature during breath-hold dives. All measurements are stored in an external memory chip. The data-processing software reads from the chip and writes the processed data into a comma-...

Journal: :Microelectronics Reliability 2007
Euan Ramsay K. A. Serrels M. J. Thomson Andrew J. Waddie R. J. Warburton Mohammed R. Taghizadeh Derryck Telford Reid

Twoand three-dimensional sub-surface optical beam induced current imaging of a silicon flip-chip is described and is illustrated by results corresponding to 166 nm lateral resolution and an axial performance capable of localising feature depths to around 100 nm accuracy. The experimental results are compared with theoretically modelled performance based on analytic expressions for the system po...

2006
Yingmin Li Mircea R. Stan Sudhanva Gurumurthi Jack W. Davidson David M. Brooks James H. Aylor

Recent product announcements show a clear trend towards aggressive integration of multiple cores on a single chip. This kind of architecture is called a “chip multiprocessor” or CMP. By taking advantage of thread level parallelism, CMP can achieve better performance/power scalability with technology than single core architectures. However, this trend presents an expansive design space for chip ...

2012
Samy E. Oraby Ayman M. Alaskari

The importance of machining process in today’s industry requires the establishment of more practical approaches to clearly represent the intimate and severe contact on the tool-chipworkpiece interfaces. Mathematical models are developed using the measured force signals to relate each of the tool-chip friction components on the rake face to the operating cutting parameters in rough turning opera...

نمودار تعداد نتایج جستجو در هر سال

با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید