In this paper, we employ the Communicating finite state machine (CFSM) model for networks to investigate fault management using passive testing. First, we introduce the concept of passive testing. Then, we introduce the CFSM model and the observer model with necessary assumptions and justification. We introduce the fault model and the fault detection algorithm using passive testing. We present ...

This paper presents a method to diagnose faults in FPGA interconnection resources. A single fault model is given. Under the given model, a diagnosing method is proposed. At most five programming steps in the proposed method is required if adaptive testing scheme is used. For non-adaptive test, eight programming steps is required to diagnose all the possible faults under the given single fault m...

For the improvement of reliability, safety and efficiency advanced methods of supervision, fault detection and fault diagnosis become increasingly important for many technical processes. This holds especially for safety related processes like aircraft, trains, automobiles, power plants and chemical plants. The classical approaches are limit or trend checking of some measurable output variables....

When injecting faults in digital systems, most approaches measures only the probability of a fault leading to a failure. This paper addresses the necessity of considering also the fault rates to get reasonable results from the fault injection experiment. For solving this problem we developed a VHDL-based fault injection tool, which allows the correct fault description and which is able to maint...

In this paper the e ects of simultaneous memory access on the fault modeling for two-port memories are investigated. New fault models and their march tests are presented. The obtained tests are of order O(n), which makes them less practical for larger two-port memories. However, the complexity can be reduced to O(n), when the memory topology is taken

In this paper, we consider the problem of test derivation from a specification FSM, assuming that all possible implementation FSMs are submachines of some nondeterministic FSM. The latter represents a restricted class of faults defined by the user. The state number in an implementation may exceed that of the specification. We present a method for test generation that can deliver shorter tests t...

The complexity of safety-related embedded computer systems is steadily increasing. Besides verifying that such systems implement the correct functionality, it is essential to verify that they also present an acceptable level of robustness. Robustness is in this thesis defined as the resilience of hardware, software or systems against errors that occur during runtime. One way of performing robus...

ÐThis paper begins with an overview of realistic fault models for dual-port memories, divided into single-port faults and faults unique for dual-port memories. The latter faults cannot be detected with the conventional single-port memory tests; they require special tests. A precise notation for all faults, such that ambiguities and misunderstandings will be prevented, has been emphasized. Next,...

In this paper, a new very fast fault simulation method to handle the X-fault model is proposed. The method is based on a two-phase procedure. In the first phase, a parallel exact critical path fault tracing is used to determine all the detected stuck-at faults in the circuit, and in the second phase a postprocess is launched which will determine the detectability of X-faults. Keywords-digital c...