A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.

This paper presents an UWB low noise amplifier (LNA) based on current reused topology to achieve low power on overall circuit in the band of 3~16GHz. Measurement of the input and output reflection coefficient S11, S22 are less than 10 dB, the maximum amplifier gain S21 gives 9.7dB, the minimum of the noise figure is 4.2dB, the measured IIP3 is 8.5dBm at 6GHz. It consumes 11mW power consumption ...

This paper reviews the major contributions proposed in literature for implementing multi-band low noise amplifiers in CMOS technology. Concurrent, switched and switched concurrent low noise amplifiers are investigated. Advantages and drawbacks are also discussed. The article tries to offer good insights on the implementation of multi-band low noise amplifiers. Keywords-CMOS; low noise amplifier...