Much of the improvement in computer performance over the last twenty years has come from faster transistors and architectural advances that increase parallelism. Smaller feature sizes have decreased the transistor switching time but at the same time increased the resistance of interconnect wires, resulting in slower signal transmission in on-chip wiring. Since future chips will have more silico...

......VLSI technology’s increased capability is yielding a more powerful, more capable, and more flexible computing system on single processor die. The microprocessor industry is moving from singlecore to multicore and eventually to manycore architectures, containing tens to hundreds of identical cores arranged as chip multiprocessors (CMPs). Another equally important direction is toward system...

The PowerPC 603 1 microprocessor is a powerful lowcost implementation of the PowerPC ArchitectureTM specification. The structured design, logic verification and test data generation methodologies of the 603 are presented in this paper. The success of these methodologies has been demonstrated by meeting the 603’s aggressive time-to-market goals. 1.0 The PowerPC 603TM Microprocessor The 603 is th...

This paper examines implementation techniques for future generations of microprocessors. While the wide superscalar approach, which issues 8 and more instructions per cycle from a single thread, fails to yield a satisfying performance, its combination with techniques that utilize more coarse-grained parallelism is very promising. These techniques are multithreading and multiprocessing. Multi-th...

Leakage power is becoming dominant part of the microprocessor chip power budget as feature size shrinks. Leakage energy consumption is of particular concern in memory structures, such as on-chip caches, for large scale transistors and rare access. Chipmakers have proposed many low leak circuit techniques for cache leakage control, in which gated-vdd and DVS are two effective methods. In this pa...

In this paper we present a novel field programmable mixedsignal integrated device consisting of a Field Programmable Gate Array (FPGA), a set of programmable and interconnectable analog cells, and a microprocessor core. This processor can run general purpose user programs, handle the dynamic reconfiguration of the programmable blocks and probe in real time internal digital and analog signals. T...

encompasses a wide range of topics in the research, design, and implementation of computer systems and their components. ICCDs unique multidisciplinary emphasis provides an ideal environment for developers and researchers to discuss practical and theoretical work covering system and processor architecture , logic, and circuit design, verification and test methods along with tools and methodolog...

Welcome to IEEE Micro’s first issue of 2005. Like last year, we begin with a theme issue on Hot Interconnects. In addition to this main theme, the issue also contains two other important articles dealing with mainstream microprocessor architectures. In my message in September-October 2004, I wrote about the balance between computation and communication, and how that must change to enable scalab...

Evaluation of a Commercial Microprocessor by Robert Yung Doctor of Philosophy in Computer Science University of California, Berkeley Professor David A. Patterson, Chair After twenty-five years of development, the field of microprocessor design is still more art than science. A commercial microprocessor design is a fine balance between many conflicting goals, such as higher performance, lower de...