We present a new sequential normal basis multiplier over GF (2). The gate complexity of our multiplier is significantly reduced from that of Agnew et al. and is comparable to that of Reyhani-Masoleh and Hasan, which is the lowest complexity normal basis multiplier of the same kinds. On the other hand, the critical path delay of our multiplier is same to that of Agnew et al. Therefore it is supp...

Health care interventions may affect the health of patients' family networks. It has been suggested that these "health spillovers" should be included in economic evaluation, but there is not a systematic method for doing this. In this article, we develop a framework for including health spillovers in economic evaluation. We focus on extra-welfarist economic evaluations where the objective is to...

Finite Field Arithmetic plays an important role in coding theory, cryptography and their applications. Several hardware solutions using Finite Field Arithmetic have already been developed but none of them are user programmable. This is probably one reason why BCH codes are not commonly used in mobile communication applications even though these codes have very desirable properties regarding bur...

Pairings are attractive and competitive cryptographic primitives for establishing various novel and powerful information security schemes. This paper presents a flexible and high-performance processor for cryptographic pairings over pairing-friendly curves at high security levels. In this design, hardware for Fp2 arithmetic is optimized to accelerate the pairing computation, and especially a co...

The designing method of folded finite-impulse response (FIR) filter on pipelined array based multiplier arrays is presented in this paper. The design is considered at the bit-level of the pipelined multiplier array and internal delays are fully exploited in order to reduce power consumption and hardware complexity, transposed FIR filter forms is considered. The proposed schemes are compared as ...

To reduce power utilization and area are some of the most important criteria for the fabrication of Digital Signal Processing and high performance systems. Optimizing the speed and area of the multiplier is a major design issue. In most of the multiplication, the multiplier is an energyhungry component. To improve energy efficiency of multipliers, the choice of multiplier is very important. Her...

Designing multipliers that are of high-speed, low power, and regular in layout are of substantial research interest. Speed of the multiplier can be increased by reducing the generated partial products. Many attempts have been made to reduce the number of partial products generated in a multiplication process one of them is Wallace tree multiplier. Wallace Tree CSA structures have been used to s...

We introduce a generalized method for constructing sub-quadratic complexity multipliers for even characteristic field extensions. The construction is obtained by recursively extending short convolution algorithms and nesting them. To obtain the short convolution algorithms the Winograd short convolution algorithm is reintroduced and analyzed in the context of polynomial multiplication. We prese...

Abstract. Starting from a general operator representation in the time-frequency domain, this paper addresses the problem of approximating linear operators by operators that are diagonal or band-diagonal with respect to Gabor frames. A characterization of operators that can be realized as Gabor multipliers is given and necessary conditions for the existence of (Hilbert-Schmidt) optimal Gabor mul...

Starting from a general operator representation in the time-frequency domain, this paper addresses the problem of approximating linear operators by operators that are diagonal or band-diagonal with respect to Gabor frames. A characterization of operators that can be realized as Gabor multipliers is given and necessary conditions for the existence of (Hilbert-Schmidt) optimal Gabor multiplier ap...