Dependence of within-die delay variations on power supply voltage (VDD) is measured down to 0.4 V. The VDD dependence of the within-die delay variation of manual layout and irregular auto place and route (P&R) layout are compared for the first time. The measured relative delay (=sigma/average) variation difference between the manual layout and the P&R layout decreases from 1.56% to 0.07% with r...

In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. It provides a common database for delay calculation, logic optimization, placement, and routing tools so that they can work and interact closely. We present results on industrial circuits showing the efficacy of this m...

Physical synthesis, the integration of logic synthesis with physical design information, was born in the mid to late 1990s, which means it is about to enter its teenage years. Today, physical synthesis tools are a major part of the EDA industry, accounting for hundreds of millions of dollars in revenue. This work looks at how technology and design trends have affected physical synthesis over th...

Important layout properties of electronic designs include space requirements and interconnection lengths. A reliable interconnection length estimation is essential for improving placement and routing techniques. Donath found an upper bound for the average interconnection length that follows the trends of experimentally obtained average lengths [2]. Yet, this upper bound deviates from the experi...

Important layout properties of electronic circuits include space requirements and interconnection lengths. In the process of designing these circuits, a reliable pre-layout interconnection length estimation is essential for improving placement and routing techniques. Donath found an upper bound for the average interconnection length that follows the trends of experimentally observed average len...

A new test pattern generation method for low power test is presented. The proposed method is based on the scan chain configuration after Place and Route (P&R) process. It is also based on the Weighted Transition Metric(WTM) for low power test pattern generation. It does not need to modify any design process and very easy to run. The experimental results of ISCAS 89’ benchmark circuits show the ...

making a distinction between the two concepts of explanation (tabyīn) and interpretation (tafsīr) in the study of history, the present article examines the status of traditional hermeneutics in the formation and development of history as a science (history science). explanation means a description of how and why a series of events take place in relation to the subject being studied in light of ...

this article proposes composition of fuzzy sets theory with discrete-event simulation and puts it into application in order to model uncertain activity duration in simulating a real-world system. the purpose of this paper is to assess the usefulness of fuzzy simulation for modeling uncertain activity duration, especially when insufficient or no sample data is available. in this research, fuzzy ...