In this paper we show new exact solutions for a type of generalized sine-Gordon equation which is obtained by constructing a Lagrange function for a dynamical coupled system of oscillators. We convert it into a nonlinear system by perturbing the potential energy from a point of view of an approach proposed by Fermi [1].

A complementary gallium-arsenide (CGaAs) 53-bit parallel array floating point multiplier is presented. The design uses Motorola's 0.5µm C-GaAs process. A conventional Wallace tree of 42 compressors is used to generate the product terms and a dynamic Ling carry select adder is utilized in the final addition to form the final mantissa. An internal latch allows the design to use a two cycle pipeli...

The fused multiply-add operation improves many calculations and therefore is already available in some generalpurpose processors, like the Itanium. The optimization of units dedicated to execute the multiply-add operation is therefore crucial to achieve optimal performance when running the overlying applications. In this paper, we present a single-precision floating-point fused multiply-add opt...

This paper presents a neural network for solving non-linear minimax multiobjective fractional programming problem subject to nonlinear inequality constraints. Neural model is designed for optimization with constraints condition. Methodology is based on the lagrange multiplier with saddle point optimization.

This paper proves the existence of competitive equilibrium in a single-sector dynamic economy with heterogeneous agents and elastic labor supply. The method of proof relies on some recent results concerning the existence of Lagrange multipliers in infinite dimensional spaces and their representation as a summable sequence and a direct application of the Brouwer fixed point theorem.

High performance multiplier designs are the prime need of emerging digital filtering operations. This research study presents a novel architecture of reduced area computation sharing multiplier for Finite Impulse Response (FIR) filter. The same architecture is extended for the floating point applications. The chosen precomputer alphabet set is the most prominent feature of this architecture. Th...

Multiplication is a basic operation in any signal processing application. Multiplication is the most important one among the four arithmetic operations like addition, subtraction, and division. Multipliers are usually hardware intensive, and the main parameters of concern are high speed, low cost, and less VLSI area. The propagation time and power consumption in the multiplier are always high. ...

This investigation proposes the novel radix-4 and radix-4 algorithms with the low computational complexities of the radix-16 and radix-64 algorithms and the low hardware requirement of the radix-4 algorithm. Base on the multiplierless radix-4 butterfly structure, the proposed radix-4 single-path delay feedback (R4SDF) design and radix-4 single-path delay feedback (R4SDF) design support the 4096...