Solutions of certain boundary value problems are shown to eIst for the fn-l) nth order dI.ferantlal equation Y (n)__ f(t,y,y’,...,y ), where f is contIauois oa a slab (a,b) Rn and f atlsfles a Lipschltz cond[tkon on the slab. Optimal length subintervals of (a,b) are deter:nlned, [ tems of the Lipschitz coefficients, on which there e[st u[que solutions.

We describe a model of short-term synaptic depression that is derived from a silicon circuit implementation. The dynamics of this circuit model are similar to the dynamics of some present theoretical models of shortterm depression except that the recovery dynamics of the variable describing the depression is nonlinear and it also depends on the presynaptic frequency. The equations describing th...

Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise or delay, or increase test pattern generation costs. This paper describes the undetectable non-feedback shorts that are likely to occur in standard cell implementations of the ISCAS'85 combinational test circuits. For ten layouts of each circuit, all shorts between adjacent wires were...

Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. We review proposition algebra [2010], an algebraic approach to propositional logic with side effects that models short-circuit evaluatio...

Identification of fault current during the operation of a power semiconductor switch and activation of suitable remedial actions are important for reliable operation of power converters. A short circuit is a basic and severe fault situation in a circuit structure, such as voltage-source converters. This paper presents a new active protection circuit for fast and precise clamping and safe shutdo...

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the π-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differen...

As MOSFET sizes and wire widths become very small in recent years, in uence of resistive component of interconnects on the estimation of propagation delay and power dissipation can no longer be neglected. In this paper we present formulas of output waveform at driving point and short-circuit power dissipation for static CMOS logic gates driving a CRC load. By representing the short-circuit curr...

We present a formula of short-circuit power dissipation for static CMOS logic gates. By representing short-circuit current by a piece-wise linear function and considering a current flowing from input node to output node through gate capacitances, the accuracy is improved significantly. The error of our formula in a CMOS inverter is less than 15% from circuit simulation in most cases of our expe...