The treatment of mitral valve disease remains dynamic; surgeons and patients must now choose between many different surgical options when addressing mitral regurgitation and mitral stenosis. Notably, advances in imaging and surgical instrumentation allow surgeons to perform less invasive mitral valve surgery that spares the sternum. With favorable long-term data now emerging, we compare the ben...

In this study we examined the effect of dopaminergic modulation on learning and memory. Parkinson's patients were tested 'on' versus 'off' dopaminergic medication, using a two-phase learning and transfer task. We found that dopaminergic medication was associated with impaired learning of an incrementally acquired concurrent discrimination task, while patients withdrawn from dopaminergic medicat...

Accepted, January 20, 2005. NOT INFREQUENTLY, PATIENTS with bilateral cerebral aneurysms are encountered. In such patients, the ability to treat bilateral aneurysms through a unilateral approach spares the patient the risk and inconvenience associated with a separate craniotomy. The contralateral approach for aneurysm repair is technically feasible and safe in appropriately selected patients. H...

We consider a k-out-of-N reliability system with identical components having exponential lifetimes. There is a single repairman who attends to failed components on a firstcome first-served basis. The repair times are assumed to be of phase type. The system has K spares that can be used according to a probabilistic rule to extend the lifetime of the system. The system is analyzed using Markov ch...

The aim of this paper is to treat the analytical solution of the truncated interarrival hyperexponential machine interference queue: H2/M/1/m+Y/m+Y in case of two branches with the following concepts: balking, reneging, state-dependent, spares, and an additional server for longer queues. Our research treats the general case for the values of m and Y considering the discipline FIFO. And some spe...

In this paper a novel methodology to achieve fault tolerance in VLSI Array Processors is proposed. A “Fence” based approach is adopted in which the logic array is partitioned and spares are distributed along the boundary of the active array. The emulator as in conventional fault tolerance techniques takes care of fault mapping and reconfiguration. The latency, reconfiguration interconnect lengt...

A fault-tolerant embedded SPMD architecture to support a pyramidal Quad-Tree motion/disparity estimation algorithm for stereoscopic image processing is proposed in this paper. The fault tolerance is obtained by using spares only for the image quality bottleneck modules (which are 6 on 90 modules) and by data derouting. Given the structure of the architecture that permits error confinement, the ...

Mission critical systems typically employ multistring redundancy to cope with possible hardware failure. Such systems are only as fault tolerant as there are many redundant strings. Once a particular critical component exhausts its redundant spares, the multi-string architecture cannot tolerate any further hardware failure. This paper aims at addressing such catastrophic faults through the use ...