Using neutron diffraction and the isotopic substitution technique we have investigated the local structure of liquid chloroform. A strong tendency for polar stacking of molecules with collinear alignment of dipole moments is found. We speculate that these polar stacks contribute to the performance of chloroform as a solvent.

Using photocatalytic reactive nanoparticles and DNA composite modified gold electrodes, exploiting the sensitivity of DNA-mediated electron transfer to base pair stacking, we examined the effects of DNA oxidation damage by photocatalytically generated hydroxyl radicals (˙OH) on charge transfer efficiency and proposed an electrochemical technique to read the effective diffusing distance of ˙OH.

The structure of disordered SiC nanowires was studied by using the threedimensional rotation electron diffraction (RED) technique. The streaks shown in the RED images indicated the stacking faults of the nanowire. High-resolution transmission electron microscopy imaging was employed to support the results from the RED data. It suggested that a 2H polytype is most possible for the nanowires.

A novel sensing material based on pyrene doped polyethersulfone worm-like structured thin film is developed using a facile technique for detection of nitroaromatic explosive vapours. The formation of π-π stacking in the thin fluorescent film allows a highly sensitive fluorescence quenching which is detectable by the naked eye in a response time of a few seconds.

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Power optimization is the major problem in digital circuit design. In this paper using MTCMOS and stack techniques are proposed. Multi threshold CMOS sleep stack and logic stack, super cutoff sleep stack and logic stack are proposed. Stacking is introduced in MTCMOS concept which decreases leakage power based on the power dissipation of pMOS and nMO Stransistor. MTCMOS technique uses multiple v...

The scaling down of technology in CMOS circuits, results in the down scaling of threshold voltage thereby increasing the sub-threshold leakage current. LECTOR is a technique for designing CMOS circuits in order to reduce the leakage current without affecting the dynamic power dissipation, which made LECTOR a better technique in leakage power reduction when compared to all other existing leakage...