A 900-MHz phase-locked loop frequency synthesizer implemented in a 0.6m CMOS technology is developed for the Wireless Integrated Network Sensors applications. It incorporates an automatic switched-capacitor (SC) discrete-tuning loop to extend the overall frequency tuning range to 20%, while the VCO gain ( VCO) resulting from the CMOS varactor continuous-tuning is kept low at only 20 MHz/V in or...

Acknowledging the lessons of Blizzard Challenge 2005 – that smooth prosodic cadence supersedes spectral resolution – but wanting a system devoid of vocoding artifacts – we introduce a hybrid trajectory-selection synthesizer. Using a parametric synthesizer to generate a pitch-synchronous sequence of F0/duration/power and spectral vectors, this trajectory serves as the target cost function for a ...

A new dual-band fractional-N frequency synthesizer is designed to support both 2GHz and 5GHz. The frequencies of two bands are synthesized by single PLL. It needs only a few additional circuits for dual band and has advantages in power and chip area. The synthesizer is composed of dual-band VCO, prescaler, 8/9 divider, PFD(phase-frequency detector), Charge Pump and LF(loop filter). 0.18um CMOS ...

A Text-to-speech synthesizer is an application that converts text into spoken word, by analyzing and processing the text using Natural Language Processing (NLP) and then using Digital Signal Processing (DSP) technology to convert this processed text into synthesized speech representation of the text. Here, we developed a useful text-to-speech synthesizer in the form of a simple application that...

A new automatic tuning scheme for continuous-time high-Q-bandpass filters is presented. It is conducted by amplitude comparison at three frequencies generated by an on-chip frequency synthesizer. Theoretical analysis and experimental results are provided. Analysis shows the tuning method is suitable for bandpass filters with 10. A m second-order filter is designed to demonstrate the proposed tu...

This paper presents a new fractional frequency synthesizer architecture and its semi-global stability and robustness analysis tool. The proposed analysis tool takes into account the switched and non linear characteristics of the system components. In order to validate this study, simulation results were obtained with electronics simulators. c opyright © 2005 IFAC

In this paper, a programmable phase-locked-loop (PLL)-based fractional-N frequency synthesizer, with the capacity of automatically adjusting the nominal frequency of voltage-controlled oscillator (VCO) is presented. The monolithic wideband VCO, with digital and analog control, is capable of operating from 1.6GHz to 2.5GHz. Analog control voltage is only varied from 0.8V to 1.2 V to improve the ...

Behavioural modeling and simulation of a PLL based integer n frequency synthesizer has been illustrated in this paper. The synthesizer generates a signal of 5.15-5.25 GHz in the UNII (Unlicensed National Information Infrastructure) lower band which is used by IEEE 802.11(a). All the PLL building blocks are modeled and simulated using Simulink. The PLL performance has been evaluated using MATLAB...

An automated continuous-flow liquid-phase peptide synthesizer for preparing C-terminal free peptides was developed. This system includes aqueous workup, concentration, and in-line NIR monitoring.