The testability of a class of regular circuits called divergent trees is investigated under a functional fault model. Divergent trees include such practical circuits as decoders and demultiplexers. We prove that uncontrolled divergent trees are testable with a fixed number of test patterns (C-testable) if and only if the module function is surjective. Testable controlled trees are also surjecti...

Improving model-based component testability can further model-based approaches to software component testing (SCT) for desirable testing effectiveness. Component contracts are useful testing-support artefacts to improve component testability. This paper presents a new contract-based SCT technique, Test by Contract (TbC), which extends the Design by Contract concept to the SCT domain, and levera...

Our goal is to synthesize hazard-free asynchronous circuits that are testable in the very stringent hazard-free robust path-delay-fault model. From a synthesis perspective producing circuits satisfying two very stringent requirements, namely, hazard-free operation and hazard-free robust path-delay-fault-testability, poses an especially exciting challenge. In this paper we present techniques whi...

A transformation-based approach to high-level test synthesis is presented. It utilizes a sequence of design-improvement transformations to generate a register-transfer level design from a VHDL behavioral specification. Selection of transformations is based on a performance-driven optimization strategy as well as a testability analysis algorithm which determines the testability-improvement techn...

| Synthesis for testability has been taken as an important topic of research and application. Tools for synthesis of fully testable circuits have been developed. These design tools are faced with an ever increasing complexity. Methods to partition large logics into parts and synthesis of each sublogic independently have been provided from different points of view recently. However, a large circ...

PURPOSE To determine the testability and lower age limits for applying common eye tests to preschool children. METHODS Investigators from the Sydney Paediatric Eye Disease Study examined 2,461 children aged 6 to 72 months between 2007 and 2009. Cycloplegic autorefraction was measured with Retinomax and Canon autorefractors. Ocular biometry was measured by the use of IOLMaster in children aged...

HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at low abstraction levels, while new modelling and design techniques have been developed for design ...

Selection of flip-flops that provide the best improvements in testability is a critical part of the partial scan design process. This paper describes a new technique for flip-flop selection that models the effect of scan in terms of the introduction of pseudo state transitions in the state transition graph. The identification of (desired) state transitions that provide for improved testability ...

Design-for-testability is a very important issue in software engineering. It becomes crucial in the case of OO designs where control flows are generally not hierarchical, but are diffuse and distributed over the whole architecture. In this paper, we concentrate on detecting, pinpointing and suppressing potential testability weaknesses of a UML class diagram. The attribute significant from desig...

recently testing of quantum-dot cellular automata (qca) circuits has attracted a lot of attention. in this paper, qca is investigated for testable implementations of reversible logic. to amplify testability in reversible qca circuits, a test method regarding to built in self test technique is developed for detecting all simulated defects. a new reversible qca mux 2×1 design is proposed for the ...