Embedded capacitance is an alternative to discrete decoupling capacitors and is achieved by enhancing the natural capacitance between power and ground planes. New materials have recently been developed by competing companies that promise to reduce the cost and improve the performance of boards with embedded capacitance. This paper introduces simple models for embedded capacitance boards and exa...

In this paper fringe capacitance of double hetero gate Tunnel FET has been studied. The physical model for fringe capacitance is derived considering source gate overlap and gate drain non overlap. Inerface trap charge and oxide charges are also introduced under positive bias stress and hot carrier stress and their effect on fringe capacitance is also studied. The fringe capacitance is significa...

We characterized the influence of conductance changes on whole-cell patch clamp capacitance measurements with a lock-in amplifier and the limitations of the phase-tracking method by numerical computer simulations, error formulas, and experimental tests. At correct phase setting, the artifacts in the capacitance measurement due to activation of linear conductances are small. The cross talk into ...

In this paper we discuss layout generation of on-chip matched capacitors with accurate capacitance ratios. Capacitor sizing and placement suitable for design of error insensitive capacitance ratios are discussed including a proposed algoritm for common-centriod placement. Also, a regular layout structure is proposed that is suitable for implementation of capacitors with well matched capacitance...

Scanning Impedance Microscopy (SIM) is one of the novel scanning probe microscopy (SPM) techniques, which has been developed to taking image from sample surface, providing quantitative information with high lateral resolution on the interface capacitance, and investigating the local capacitance–voltage (C–V) behavior of the interface and AC transport properties. The SIM is an ordinary AFM equip...