In this research communication, we comment on “Dual-rail asynchronous logic multi-level implementation” [Integration, the VLSI Journal 47 (2014) 148-159] by expounding the problematic issues, and provide some clarifications on delay-insensitivity, robust asynchronous logic, multi-level decomposition, and physical implementation.

This article presents an asynchronous FPGA architecture for implementing cryptographic algorithms secured against physical cryptanalysis. We discuss the suitability of asynchronous reconfigurable architectures for such applications before proceeding to model the side channel and defining our objectives. The logic block architecture is presented in detail. We discuss several solutions for the in...

Sequential Pattern Mining (SPM) is considered as an interesting data mining problem conducted in research works. In SPM, the time-series pattern can be used as a tool for identifying the behavior of the patterns while mining sequential pattern types of data. Mining time series patterns in temporal dataset acts as an imperative function in data mining and knowledge detection mechanisms. Several ...

As transient error rates are growing due to smaller feature sizes, designing reliable synchronous circuits becomes increasingly challenging. Asynchronous logic design constitutes a promising alternative with respect to robustness and stability. In particular, delay-insensitive asynchronous circuits provide interesting properties, like an inherent resilience to delay-faults. This paper presents ...

As transient error rates are growing due to smaller feature sizes, designing reliable synchronous circuits becomes increasingly challenging. Asynchronous logic design constitutes a promising alternative with respect to robustness and stability. In particular, delay-insensitive asynchronous circuits provide interesting properties, like an inherent resilience to delay-faults. This paper presents ...

The paper is concerned with the modeling of the electrical signals and of the asynchronous circuits by } 1 , 0 { → R functions and asynchronous automata. The equations of the asynchronous automata are written and solved; the stability, the fundamental mode of operation, the semi-modularity and some aspects of semantics of the propositional temporal logic as seen from behind asynchronous automat...

The problem of counteracting the effects of adversarial inputs on the operation of an asynchronous sequential machine is considered. The objective is to build an automatic state-feedback controller that returns an asynchronous sequential machine to its original state, after the machine has undergone a state transition caused by an adversarial input. It is shown that the existence of such a cont...

This paper presents a survey on high-throughput and ultra low-power asynchronous pipeline design method targeting to latchfree and extremely fine-grain design. Since they are asynchronous, these pipelines avoid problems related to high-speed clock distribution, such as clock power, clock skew, and rigidity in handling varied environments. The pipeline communication is structured in such a way t...