Abstract An efficient store layout presents merchandise to attract customer attention and encourages customers walk down more aisles which exposes them merchandise, has been shown be positively correlated with the sales. It is one of most effective in-store marketing tactics can directly influence decisions boost sales profitability. The recent development Artificial Intelligence techniques, es...

With applications ranging from fields as distinct as fuzzy modeling (Xiong 2001), autonomous robot behavior (Luk et al. 2001), learning with backpropagation (Foo et al. 1999), and multicriteria optimization (Viennet et al. 1996), evolutionary methods have become an indispensable tool for systems scientists. Although already studied in the past, an interesting emerging issue is the use of multip...

the full adders (fas) constitute the essential elements of digital systems, in a sense that they affect the circuit parameters of such systems. with respect to the mosfet restrictions, its replacement by new devices and technologies is inevitable. qca is one of the accomplishments in nanotechnology nominated as the candidate for mosfet replacement. in this article 4 new layouts are presented fo...

A new cavity-chain layout has been proposed for the main linac of the TESLA linear collider [1]. This superstructure-layout is based upon four 7-cell superconducting standing-wave cavities, coupled by short beam pipes. The main advantages of the superstructure are an increase in the active accelerating length in TESLA and a saving in rf components , especially power couplers, as compared to the...

This paper presents a computer-aided design tool, IPRAIL, which automatically retargets existing analog layouts for technology migration and new specifications. The reuse-based methodology adopted in IPRAIL utilizes expert designer knowledge embedded in analog layouts. IPRAIL automatically extracts analog circuit and layout intellectual properties as templates, incorporates new technology desig...

The manufacturability benefits of restricted design style have long been recognized in the implementation of SRAM and FPGA circuits. However, the ASIC community has shied away from layout restrictions for the fear of stifling designers’ creativity and creating an inefficient area, and thus cost, product. Nevertheless, as the design features required began to approach nanometer-scale dimensions,...