This paper investigates methods for quantifying convective weather delay reduction benefits for weather/ATM systems and recommends approaches for future assessments. This topic is particularly important at this time because: 1. Convective weather delays continue to be a dominant factor in the overall National Airspace System (NAS) delays, and 2. Benefits quantification and NAS performance asses...

We present a model order reduction method which allows the construction of a reduced, delay free model of a given dimension for linear time-delay systems, whose characteristic matrix is nonlinear due to the presence of exponential functions. The method builds on the equivalent representation of the time-delay system as an infinite-dimensional linear problem. It combines ideas from a finite-dime...

In this study we created a new routing fabric for reducing power and delay. The power consumed in a FPGA core consists of both static and dynamic components. Static power contributes only 10% of the total power consumed in a FPGA. On the other hand, dynamic power contributes over 90% of the total power consumed and it is the main source for their power inefficiency. By reducing net length and/o...

A NULL Cycle Reduction (NCR) technique is developed to increase the throughput of delay-insensitive digital systems. NCR reduces the time required to flush complete DATA wavefronts, commonly referred to as the NULL or Empty cycle. The NCR technique exploits parallelism by partitioning input wavefronts such that one circuit processes a DATA wavefront, while its duplicate processes a NULL wavefro...

As technology scales down, coupling between nodes of the circuits increases and becomes an important factor in interconnection analysis. In many cases like the deep submicron technology (DSM), the coupling between lines (inter-wire capacitance) is strong and the power consumed by parasitic capacitance is non-negligible [1-6]. In this work, we employ the differential low-weight encoding [1] to r...

In this paper, a technique to approximate a class of passive delay systems by a bond graph model is investigated. This method is designed to preserve the passivity of the initial model. Through interconnections of passive elementary blocks (passivity is stable under interconnections), a finite dimensional passive approximant is constructed. This finite dimensional model, if need be, is reduced ...

This paper presents a comparative analysis of reduced segment; T and ? RLC interconnect models. With down scaling of technology, the interconnect structures have became a predominant factor in determining the overall circuit performance. Controlling interconnect propagation delay is the fundamental parameter to high speed VLSI designs. In this work, model performance has been evaluated in terms...

background: the purpose of this study was to compare patient delay, diagnosis delay and treatment delay in breast cancer patients of selected public and private health centers in tehran, iran. methods: in this cross-sectional study, female patients with newly diagnosed breast cancer in a public medical complex and a private breast clinic within one year were included. patient delay was consider...

Flip-flops are essential elements of a design from both delay and energy aspects. A significant fraction of the total power in highly synchronous systems 1s dissipated over clock networks. Hence, lowpower clocking schemes are promising approaches for future desfgns. Recently, there has been published several energy recovery flip-flops that enable energy recovery from the clock network, resultin...