The speed of digital circuit is one of the most restricting factors in the deep sub-micron and multigigahertz integrated circuits design. It is directly dependent on the circuit delay. Scaling down the technologies and increasing the operational frequency make the delay problems more important. This paper studies the delay in digital circuits, starting from the design process, scaling down the ...

Although the general purpose processing unit provides high flexibility and controllability, sometimes it cannot meet the efficiency and power requirements that we expect. For example, real-time applications need to meet the real-time performance, and the mobile devices need to meet the power constraints. In such cases, we need specific instructions that are designed for high efficiency or low p...

In our previous computational work, we showed that gene digital circuits can be automatically designed in an electronic fashion. This demands, first, a conversion of the truth table into Boolean formulas with the Karnaugh map method and, then, the translation of the Boolean formulas into circuit schemes organized into layers of Boolean gates and Pools of signal carriers. In our framework, gene ...

The synthesis of digital circuits is generally performed in two level logic switching algebra. But if we increase the representation domain from two level logic (N=2) to N>2 then the design of Multiple Valued Logic (MVL) digital circuits is possible. Interconnections play an important role in deep submicron designs as they affects power and area. Due to the requirement of interconnections the d...

The most versatile application for digital phase locked loops is for clock generation and clock recovery in any complex computer architecture like a microprocessor or microcontroller, network processors. Digital Phase locked loops are commonly used to generate timing on chip clocks in high performance mixed signal analog and digital systems. Most of the systems employ digital PLL mainly for syn...

Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions Josephson junctions per square centimeter. However, conventional DC and multi-phase AC biasing techniques already encounter serious challenges for scaling above several hundred thousand junctions. In this work, we propose a novel AC-based scheme RS...

Digital numbers D are the world’s most popular data representation: nearly all texts, sounds and images are coded somewhere in time and space by binary sequences. The mathematical construction of the fixed-point D ' Z2 and floating-point D′ ' Q2 digital numbers is a dual to the classical constructions of the real numbers R. The domain D′ contains the binary integers N and Z, as well as Q. The a...

Subthreshold source-coupled logic (STSCL) circuits can be used in design of low-voltage and ultra-low power digital systems. This article introduces and analyzes new techniques for implementing complex digital systems using STSCL gates with an improved power-delay product (PDP) based on source-follower output stages. A test chip has been manufactured in a conventional digital 0.18μm CMOS techno...