The standard procedure for hardware design consists of describing circuit in a hardware description language at logic level followed by extensive verification and logic-synthesis. However, this process consumes significant time and needs a lot of effort. An alternative is to use formal specification language as a high-level hardware description language and synthesize hardware from formal speci...

The role of automatic formal protocol veriica-tion in hardware design is considered. Principles are identiied that maximize the beneets of protocol veriication while minimizing the labor and computation required. A new protocol description language and veriier (both called Mur') are described , along with experiences in applying them to two industrial protocols that were developed as part of ha...

We have developed PGPG (Pipeline Generator for Programmable GRAPE), a software which generates the low-level design of the pipeline processor and communication software for FPGA-based computing engines (FBCEs). An FBCE typically consists of one or multiple FPGA (Field-Programmable Gate Array) chips and local memory. Here, the term “Field-Programmable” means that one can rewrite the logic implem...

This work inserts in the general field of collective robotics. In this paper, we present the results on the design and the conception of (1) our robotics component called Atom, (2) the informal semantics of the HoRoCoL language. The expressivity of the language is illustrated on a simple example. At the hardware level, we propose a versatile architecture easily adaptable for most mechatronic sy...

Image processing is used in very large and expanding areas covering applications in multimedia services, arts, medicine etc. For improving the performance of image processing systems the vital solution is implementation of image processing techniques in hardware. This paper presents the objects counting such as coins, with their implementation and simulation results using a hardware description...

interested (and read German) I have a copy of the complete conference proceedings.

The purpose of the Smalltalk project is to provide computer support for the creative spirit in everyone. Our work flows from a vision that includes a creative individual and the best computing hardware available. We have chosen to concentrate on two principle areas of research: a language of description (programming language) that serves as an interface between the models in the human mind and ...

Quartz is a new declarative hardware description language with polymorphism, overloading, higher-order combinators and a relational approach to data flow, supporting formal reasoning for design verification in the same style as the Ruby language. The combination of parametric polymorphism and overloading within the language involves the implementation of a system of constrained types. This pape...

The design and veri cation of a high speed sorter core is presented. We present several techniques and tools used to verify the functionality of the sorter. The sorter is a periodic sorter based on recursive butter y networks. Having a design language that is well-suited to describing these networks has helped us to explore the design space far more e ectively than is possible using conventiona...