In this work a novel bulk-driven (BD) ultra-low-voltage (ULV) class-AB operational transconductance amplifier (OTA) which exploits local common mode feedback (LCMFB) strategies to enhance performance and robustness against process, voltage temperature (PVT) variations has been proposed. The body-to-gate (B2G) interface increase the slew rate attain behaviour, whereas two pseudo-resistors have e...

This article proposed a simple self cascode RGC amplifier configuration to increase the gain and bandwidth. The cascode amplifier eliminates the miller capacitance between input and output and facilitates high gain, high input and output impedance with high bandwidth. However, the cascode amplifier requires relatively high supply voltage for proper operation and it decreases the output voltage ...

This paper presents a fixed gain high output power amplifier with performance determined by using on-wafer measurement. The amplifier is fully differential based on inductive load and resistive degeneration which is designed using a 0.18 μm SiGe BiCMOS process. The amplifier achieves power gain of 7.2 dB, 3-dB bandwidth of 2.06 GHz, operating frequency of 12 GHz, power consumption of 12 mW usin...

This paper describes a 60-GHz differential power amplifier (PA) designed in a 120-GHz fT 90nm CMOS technology. It consists of three identical differential cascode stages with inter-stage matching implemented by wide-gap coplanar waveguide (CPW) structures and M6M5 plate capacitors. A double-stub network realized by CPWs provides more design freedom for the input matching. Load-pull simulation g...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

Abstract This report is an outcome of a master degree project at Linköpings University in cooperation with Micronic Laser Systems AB. The purpose with this master degree project was to investigate how to implement a receiver in a data transfer system. The system consists of several data channels, where every channel consists of three parts: driver, transmission lines and receiver. The driver se...

Power line interference is a major problem in high-resolution biopotential measurements. Because interference coupling is mostly capacitive, shielding electrode leads and a high common-mode rejection ratio (CMRR) are quite effective in reducing power-line interference but do not completely eliminate it. We propose a model that includes both interference external to the measuring system and inte...

INTRODUCTION Since 2002, with the creation of Centers of Memory Resources and Research (CMRR), considerable progress has been made in France regarding the administrative and institutional framework within which Alzheimer's disease (AD) is managed. In this study, we explore three approaches that can help optimize the inclusion of patients in clinical trials related to AD. They are as follows: to...