Scheduling is one of the main problems that need to be solved by high-level hardware and software compilers. Existing heuristics are often incapable of finding feasible solutions for practical examples, because the tight time and resource constraints make the feasible-solution subspace very small compared to the size of the full search space. For that reason, constraint-analysis techniques that...

One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the results are usually checked by simulation. In consequence, both the behavioral specification and the HLS results have to be simulated by the same set of test vectors. Due to the HLS and the inherent changes in the cycle-b...

We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is considerably faster than lenient execution, and faster than any other known approach applicable for general (including non-pipelined) computation structures. We present experimental evidence obtained by implementing our me...

This application note discusses various design techniques for implementing resampling filters using the Altera® DSP Builder advanced blockset. The DSP Builder advanced blockset supports constraint-based high-level synthesis and is particularly efficient for implementing multiple channel, high-performance resampling filters. You can use the DSP Builder advanced blockset to quickly map highly abs...

In this paper a novel algorithm for sound texture synthesis is presented. The goal of this algorithm is to produce new examples of a given sampled texture, the synthesized textures being of any desired duration. The algorithm is based on a montage approach to synthesis in that the synthesized texture is made up of pieces of the original sample concatenated together in a new sequence. This monta...

Image aesthetics assessment has been challenging due to its subjective nature. Inspired by the scientific advances in the human visual perception and neuroaesthetics, we design Brain-Inspired Deep Networks (BDN) for this task. BDN first learns attributes through the parallel supervised pathways, on a variety of selected feature dimensions. A high-level synthesis network is trained to associate ...

Conditional resource sharing has been identified as a possibility for optimizing high-level synthesis results. In this paper we propose a Hierarchical Conditional Dependency Graph representation that permits to treat conditional resource sharing in a generic fashion depending on the specific context, i.e. functional units, storage elements and interconnects. Resource usage conditions are repres...

The document is organized as follows: chapter 2 describes the software installation process, chapter 3 shows the calling syntax of the SIF-to-CDFG format converter. Chapter 4 and 5 gives an overview on the handling of the graphical interfaces of the high-level transformation and high-level synthesis software tools. For theoretical background and realization details take a look at the research p...

This paper addresses the problem of development productivity on reconfigurable platforms. Due to the availability of generic low level tools and powerful logic synthesis tools, it becomes possible to define portable components that have both a high level behavior and attributes for physical synthesis. The behavior of a component can be fixed at compile time using concise specifications that wil...

| Since manufacturing processes inherently uctuate, LSI chips which are produced from the same design have di erent propagation delays. However, the di erence in delays caused by the the process uctuation has rarely been considered in most high-level synthesis systems which were developed before. This paper presents a new approach to module selection in high-level synthesis, which exploits di e...