-In this paper, we designed and implemented an integrated circuit for contactless interface transmission system to conform the transfer protocol of ISO/IEC 144432 Type B. The system consists of two major parts, interrogator and transponder, for magnetic power and data transmission. The power and data can be transferred to the transponder synchronously from the interrogator by the 10% ASK modula...

In order to design large digital circuits using Quantum-Dot Cellular Automata(QCA) cells, CAD tools and automated design methodology for QCA circuits are essential. This paper presents a QCA circuits design methodology based on traditional CMOS circuits design flow. This QCA circuits design methodology utilizes the current CMOS circuits design tools such as HSPICE and Synopsys Design Compiler. ...

As we enter the deep submicron era, the steadily shrinking feature sizes make charge sharing much easier among physically adjacent nodes in integrated circuits, which ultimately results in DNU (Double Nodes Upset). In this paper, we propose a 16-transistor memory cell. Hspice simulation shows this cell maintains its original logic status under SNU (Single Node Upset) and DNU, while DICE (Dual I...

There is a rapid need to explore the design issues of circuits in deep submicron nodes. This paper presents the design and performance analysis of Dual-X CCII, a widely used analog building block using state of the art Si CMOS and a proposed Hybrid (employing both CMOS and CNFET) configuration at 32nm. Current bandwidths port resistances along with power consumption have been chosen as the para...

Mixed-Signal extensions to VHDL and SystemC languages have been developed in order to provide a unifying environment for the modeling and verification of AMS designs at different levels of abstraction. In this paper, we model the behavior of a set of benchmark designs in VHDL-AMS and SystemC-AMS and compare the simulation run-time with the low level HSPICE simulation run-time. The various exper...

Power saving is more important than any other thing now a days because high speed and low power design continues to get more attention. In this paper, low power dynamic circuit [1] has been implemented at 180nm, 90nm, 45nm and 32nm technology, using HSPICE. The simulations are performed on CosmosScope. The power saved is up to 46%, 50%, 51% and 73% for 180nm, 90nm, 45nm and 32nm technology resp...

Carbon Nanotube filed-effect transistor (CNFET) is one of the promising alternatives to the MOS transistors. The geometrydependent threshold voltage is one of the CNFET characteristics, which is used in the proposed design. In this paper, we present a novel high speed Adder-subtractor cell using CNFETs based on XOR gates and multiplexer. Presented design uses fourteen transistors, ten for full ...

Power optimization is the major problem in digital circuit design. In this paper using MTCMOS and stack techniques are proposed. Multi threshold CMOS sleep stack and logic stack, super cutoff sleep stack and logic stack are proposed. Stacking is introduced in MTCMOS concept which decreases leakage power based on the power dissipation of pMOS and nMO Stransistor. MTCMOS technique uses multiple v...

A high-performance operational transconductance amplifier (OTA) is proposed. In order to increase DC gain, gain bandwidth, and the slew rate under low standby quiescent current, the proposed OTA has the dynamic output current scaling and class AB operation. Under the condition of 250 A quiescent current and a 30 pF load capacitance with a step voltage from 1.2 to 1.5V at a rise time of 1 nsec i...

In this study, we designed the OTA circuit for Gm-C active filter using the direct transform method that has capable of various frequency tuning. The OTA make it enable filter design that can be used in various frequency bands due to control trans-conductance by using external voltage control. Our OTA circuit can be used for active filter of CDMA also other device that use other frequency bands...