Floating-point division is indispensable and becoming increasingly important in many modern applications. To improve speed performance of floating-point actual microprocessors, this paper proposes a low-latency architecture with multi-precision for which will meet the IEEE-754 standard. There are three parts design: pre-configuration, mantissa division, quotient normalization. In part based on ...

Convolutional neural networks (CNNs) have been widely used in many tasks, but training CNNs is time consuming and energy hungry. Using the low-bit integer format has proved promising for speeding up improving efficiency of CNN inference, while can hardly benefit from such a technique because following challenges: 1) data cannot meet requirements dynamic range training, resulting accuracy drop; ...