The development of devices for the Internet Things (IoT) requires rapid prototyping different hardware configurations. In this paper, a modular platform allowing to prototype, test and even implement IoT appliances on low-cost reconfigurable is presented. proposed platform, named Dracon, includes Z80-clone microprocessor, up 64 KB RAM, 256 inputs/outputs (I/Os). These I/Os can be used connect a...

Power has become one of the most important paradigms of design convergence for multi gigahertz communication systems such as optical data links, wireless products, microprocessor & ASIC/SOC designs. POWER consumption has become a bottleneck in microprocessor design. The core of a microprocessor, which includes the largest power density on the microprocessor. In an effort to reduce the power con...

In microprocessor-based systems, data and address buses are the core of the interface between a microprocessor and the external world. The increasing gap between interfaces has pushed CPU designers to increase the bandwidth of the data transfer. Moreover, modern software applications span a very large address space. With very wide address and data busses, the power dissipation on bus interfaces...

The drilling length is an important parameter in the process of horizontal directional drilling (HDD) exploration and recovery, but there has been a lack of accurate, automatically obtained statistics regarding this parameter. Herein, a technique for real-time HDD length detection and a management system based on the electromagnetic detection method with a microprocessor and two magnetoresistiv...

Focal Plane Cellular Visual Microprocessor chip development reached the necessary technology level that it can be applied in industrial vision systems. These TeraOPS speed, internally analog visual chips can capture and process thousands of medium resolution images in a second. The price for this extraordinary high speed is that their hardware-software environment and programming method is far ...

Future integrated circuits that contain more than one billion transistors will allow much more complex designs than possible today. Unfortunately, there will be problems with clock distribution and on-chip communication delays. One approach to address these problems is to make a Network on Chip (NoC), that handles communication over the chip. Research in the area is being done at KTH, and a sim...

John Gilmore of the Electronic Frontier Foundation (EFF) and I had several discussions in early 1997 about actually building such a machine. Approaches using FPGAs, microprocessor arrays, and networks of low-cost PCs were prohibitively expensive, but our projections showed that low-volume ASIC fabrication processes were well-suited to the task. John then arranged $250,000 in financing for the p...

The design of Digital's NVAX CPU chip provided the opportunity to bring RISC-class performance to deskside CISC VAX computer systems. The new VAX 4000 Model 400, 500, and 600 low-end systems take full advantage of the performance capabilities of the NVAX microprocessor. The three systems offer from two to four times the performance of the previous top-ofthe-line VAX 4000 Model 300 system in the...

In this paper, we propose a design and implementation of photography card reader by utilizing a high integration chip solution. The system uses the two machines: one is a popular card reader and the other is a photo player. To reach a higher level of performance and system flexibility, we integrate many independent components into a single chip and provide a system on chip (SOC) solution. As a ...

In this chapter, the architecture, design and implementation of a vision chip with general-purpose programmable pixel-parallel cellular processor array, operating in single instruction multiple data (SIMD) mode is presented. The SIMD concurrent processor architecture is ideally suited to implementing low-level image processing algorithms. The datapath components (registers, I/O, arithmetic unit...