ABSTRACT H.264 as a new-generation video coding algorithm is becoming increasingly important for international broadcasting standards such as DVB-H and DMB. In comparison to its predecessors MPEG-2 and MEPG-4 SP/ASP, H.264 achieves improved compression efficiency at the cost of increased computational complexity. Real-time execution of the H.264 decoding process poses a large challenge on mobil...

Multi-core processors have become the dominant market trend because they provide a great opportunity in increasing processing performance by exploiting various parallelisms. In JPEG (Joint Photographic Experts Group) compression, color space conversion is one of the major kernels known as a computationally expensive module. This paper presents a fast solution for color space conversion with mul...

Packet classification is crucial to the implementation of advanced network services that require the capability to distinguish traffic in different flows, such as access control in firewalls and protocol analysis in intrusion detection systems. This paper proposes a novel packet classification algorithm optimized for multi-core network processors. The proposed algorithm, AggreCuts, has an expli...

Compared to specialized network equipment, software routers running on commodity servers allow programmers to rapidly build and (re)program networks using the software and hardware platforms they tend to be most familiar with—that of the general-purpose computer. Unfortunately, the Achilles’ heel of software routers has been performance; commodity servers have traditionally proven incapable of ...

Diverse application scenarios and real-time constraints on computer-vision applications have motivated numerous explorations of computer architectures that provide more efficiency through hardware scalability by exploiting the characteristics of image processing and computer vision algorithms. The growing and computational power and programmability of the of multi-core architectures provide gre...

The growing number of transmission standards and technologies leads to an increased interest in software defined radios (SDRs). To provide the required computing power for these SDRs, multi processor architectures are considered as a realistic approach. To achieve an optimum speedup, the algorithmic descriptions of the digital baseband processing tasks have to be adequate for these architecture...

The LOw-Frequency ARray (LOFAR) is a phasedarray radio telescope in the Netherlands. Currently, the astronomical community is embarking upon designing a new telescope, the Square Kilometer Array (SKA). As many of the LOFAR techniques form the basis for several SKA modes of operation, a retrospective analysis of LOFAR, reviewing its design given recent advances in technology, is of interest. Thi...

For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigurable solution, but partitioning, mapping, modelling and programming such systems remains an issue. A semantic model has been presented to allow the development of the model for the specification, design and implementa...

The broad availability of multi-core chips on standard desktop PCs provides strong motivation for the development of new algorithms for logic model checkers that can take advantage of the additional processing power. With a steady increase in the number of available processing cores, we would like the performance of a model checker to increase as well – ideally linearly. The new trend implies a...