The scaling of the CMOS technologies has a great impact on analog design. The most severe consequence is a reduction of the voltage supply. In this article, a new low-voltage folded-switching mixer with current-reuse, which operates at 1 V supply voltage, is discussed. The main advantages of the introduced mixer topology are: a high voltage gain, a low noise figure, an operation at low supply v...

A noise reduction input matching technique for broadband low noise amplifiers (LNAs) is presented. The proposed LNA employs a positive active feedback network besides of the conventional common-gate (CG) amplifier to achieve both wideband input signal matching and low noise figure (NF), simultaneously. Compared to the conventional broadband noise cancellation techniques, the presented approach ...

A 45MHz-2.5GHz broadband CMOS up-conversion mixer implemented in a conventional 0.18µm technology is presented this letter. The offered employs bisymmetric class-AB input stage order to provide high linearity and match the IF impedance over 0.3-20.15MHz frequency range. draws 3mA current from 1.8V supply voltage, core chip dimension of 0.05*0.08mm2. At range 45MHz-2.5GHz, output third-order int...

A 2.4-GHz inductive degenerate differential narrowband low-noise amplifiers (LNAs) using 0.18um CMOS Technology are presented in this paper. The LNA is properly biased operates at 1.8 volts power supply and perfectly matched input impudence of 50 ohms. The LNA has the Noise figure <2.5dB, Gain(S21) >20dB,Input impedance (S11) <-20dB, Output impedance (S22) <-10dB,IIP3>-10dBm.

Linearity characteristics of hetero-gatedielectric tunneling field-effect transistors (HG TFETs) have been compared with those of high-k-only and SiO2-only TFETs in terms of IIP3 and P1dB. It has been observed that the optimized HG TFETs have higher IIP3 and P1dB than high-k-only and SiO2-only TFETs. It is because HG TFETs show higher transconductance (gm) and current drivability than SiO2-only...

This paper presents a Sub-mW differential Common-Gate Low Noise Amplifier (CGLNA) for ZigBee standard. The circuit takes the advantage of shunt feedback and Dual Capacitive Cross Coupling (DCCC) to reduce power consumption and the bandwidth extension capacitors to support 2.4 GHz ISM band. An amplifier employing these techniques has been designed and simulated in 0.18 mm TSMC CMOS technology. T...

A highly linear, low voltage, low power, low noise amplifier (LNA) using a novel nonlinearity cancellation technique is presented in this paper. Parallel Inductor (PI) matching is used to increase LNA gain by 3 dB at the desired frequency. The linear LNA was designed and simulated in a TSMC 0.18μm CMOS process at 5GHz frequency. By employing the proposed technique, the IIP3 is improved by 12 dB...

This paper presents a 2.14GHz RF front end for Wide-band Code Division Multiple Access (WCDMA) receiver. The receiver is based on direct conversion architecture and implements a low noise amplifier (LNA) and a quadrature mixer in 0.25μm CMOS process. The receiver achieves a noise figure (NF) of 8.93dB, provides a gain of 17.14dB, has an IIP3 of -15.04dB and dissipate 72.15mW at 2.5V.

The design of broadband, highly integrated up-converters is described. Two up-converters have been designed to reduce the complexity and cost of broadband millimetre wave systems by integrating a number of functions into a compact MMIC. Broadband performance was achieved for 20-30 GHz and 35-45 GHz with OIP3 exceeding 24 and 15 dBm, respectively; 2xLO leakage better than 3 dBm and excellent gai...

A low-power 435-MHz differential low-noise amplifier with on-chip spiral inductors was implemented in a 0.5-μm standard CMOS process. The LNA is intended for use in a low-power low-IF receiver under development for deep space communication. Current reuse technique is employed for lowpower operation. Low-noise layout techniques are used to improve the noise performance. Design trade-offs to achi...