Abstract This study investigates whether the use of prosodic cues during instruction facilitates processing German accusative case markers. Two groups third semester L1 English learners L2 completed Processing Instruction (PI) with aural input: Learners in PI+P group heard sentences that included focused cues; PI monotone prosody. The effects training were assessed through an offline comprehens...

High-performance processors will increasingly rely on multibanked first-level caches to meet frequency requirements. In this paper we introduce replication degree and data distribution as the main multibanking design axes. We sample this design space by selecting current data distribution policy proposals, measuring them on a detailed model of a deep pipelined processor and evaluating the trade...

It was the purpose of this study to examine and describe first-grade children’s development of strategic processes for detecting and correcting errors, problem solving difficult or novel words, and confirming responses in order to be successful as they participated in Reading Recovery instruction, as opposed to simply increasing “item” knowledge (i.e., identifying more letters, recognizing more...

Directed forgetting (DF) assists in preventing outdated information from interfering with cognitive processing. Previous studies pointed that self-referential items alleviated DF effects due to the elaboration of encoding processes. However, the retrieval mechanism of this phenomenon remains unknown. Based on the dual-process framework of recognition, the retrieval of self-referential informati...

This paper describes recent large-scale-integration programmable processors designed for multimedia processing such as real-time compression and decompression of audio and video as well as the generation of computer graphics. As the target of these processors is to handle audio and video in real time, the processing capability must be increased tenfold compared to that of conventional microproc...

Today’s desktop PCs feature a variety of parallel processing units. Developing applications that exploit this parallelism is a demanding task, and a programmer has to obtain detailed knowledge about the hardware for efficient implementation. CGiS is a data-parallel programming language providing a unified abstraction for two parallel processing units: graphics processing units (GPUs) and the ve...

In today’s computing environments, the concurrent execution of multiple applications/threads is common and multi-cores are very well-suited to handle such workloads. However, they suffer from the fact that any mismatch between the application’s inherent instruction-level parallelism (ILP) and the core’s parallelism leads to unused resources or loss in performance. An accepted solution is to inc...

We present fast strongly universal string hashing families: they can process data at a rate of 0.2 CPU cycle per byte. Maybe surprisingly, we find that these families— though they requires a large buffer of random numbers—are often faster than popular hash functions with weaker theoretical guarantees. Moreover, conventional wisdom is that hash functions with fewer multiplications are faster. Ye...

This paper gives an overview of research efforts concentrating on developing ISA (Instruction Set Architecture) extensions on general-purpose workstation and desktop processors. Two major trends are increasing utilization of data-level parallelism in twodimensional data processing and increasing the number of operations executed per one instruction to obtain more complex functionality. Several ...