This paper introduces the concept and technology of Application-domain Specific Instruction-set Processor (ASIP). First, VLSI design trend over the decades is overviewed and processors are shown to be expected one of the main components in the System Level Design. Then, the advantage of ASIP over General Purpose Processor (GPP) and Application Specific Integrated Circuit (ASIC) is illustrated. ...

This paper describes the MetaCore system which is an application-specific instruction-set processor (ASIP) development system targeted for digital signal processor (DSP) applications. The goal of the MetaCore system is to offer an efficient design methodology meeting specifications given as a combination of performance, cost, and design turnaround time. The MetaCore system consists of two major...

We present the capabilities of the scripting language Open PROMOL and its processor. The intention of the language is to pre-program specifications for modifying programs written in a target language. We use its processor either as a tool for developing the stand-alone reusable components or as a “component-from-the-shelf” in generative tools for generating domain specific programs. The process...

Analyzing and evaluating the sensitivity of embedded systems to soft-errors have always been a challenge for aerospace or safety equipment designer. Different automated fault-injection methods have been developed for evaluating the sensitivity of integrated circuit. Also many techniques have been developed to get a fault tolerant architecture in order to mask and mitigate fault injection in a c...

A new control flow checking scheme, based on assigned-signature checking by a watchdog processor, is presented. This scheme is suitable for a multitasking, multiprocessor environment. The hardware overhead is comparatively low because of three reasons: first, hierarchically structured, the scheme uses only a single watchdog processor to monitor multiple processes or processors. Second, as an as...

H/W independenl / Abstract: I n this paper, we describe a software environment for general purpose MIMD machines based on packet switched message passing paradigms. The environment provides system calls for communication between various processing elements in the machine and system calls to get the configuration of the system. It assumes the presence of a Host processor through which facilities...

In this paper we describe a practical implementation of parallel computation for the molecular dynamics (MD) simulation of an alkane/aluminum oxide interface. A serial MD program was converted into a parallel code utilizing the message passing interface (MPI). This code was evaluated on a twelve processor symmetrical multi-processor as well as on a cluster of four processor SMPs. A maximum spee...

We investigate the suitability of hardware multithreading for real-time event handling in combination with a Java microcontroller. Our aim is to design all hardware components such that the program execution time can be statically calculated in a cycle-accurate manner. In the field of microcontrollers it is important to incorporate peripheral interfaces into the processor die. We explored the s...

A simple fork and join type of job structure has been extensively used for performance evaluation of processor scheduling policies in multiprocessor systems. However, parallel programs often exhibit a more complicated structure. It is not clear how the program structure affects the performance of processor scheduling policies. This paper studies the impact of the program structure on the perfor...

In multiprocessors a parallel program's execution time is directly innuenced by the number of processors it is allocated. The problem of scheduling parallel programs in a multiprogrammed environment becomes one of determining how to best allocate processors to the diierent simultaneously executing programs in order to minimize mean response time. In this paper we address the problem of how many...