In most of the digital systems the full-adders are the basic and the fundamental components. Due to the increase in number of transistors on the chip and its shrinkage has made the power consumption to be more. This power consumption is due to the flow of current and causes the battery life to be reduced. Hence the need of low power designs is the primary requirement in the VLSI field. The full...

Recently, the influence of the silicon area on the delay time, power dissipation and the leakage current is a crucial issue when designing a full adder circuit. In this paper, an efficient full adder design referred to as 10-T is proposed. The new design utilized the use of XNOR gates instead of XOR in the full adder implementation and, as a result, the delay time and power dissipation are sign...

Micro-electronic devices are playing a very prominent role in electronic equipments which are used in daily life. For electronic equipment battery life is important. So, in order to reduce the power consumption we implement a Sleepy technique to the electronic circuits. Sleepy technique is also called as power gating technique. In the power gating structure, a circuit operates in two different ...

This paper presents pre-layout simulations of a proposed 8T full adder design using a proposed 3T XNOR gate cell. The proposed design remarkably reduces power consumption hence power-delay product (PDP) over various input voltages and frequencies. It also improves temperature sustainability as compared to the existing 8T full adder. This proves to be a viable option for low power and energy eff...

Since in designing the full adder circuits, full adders have been generally taken into account, so as in this paper it has been attempted to represent a full adder cell with a significant efficiency of power, speed and leakage current levels. For this objective, a comparison between five full adder circuits has been provided. Applying floating gate technology and refresh circuits in the full ad...

Next-generation nano-scale computational systems are being hampered by two significant obstacles: shrinking transistor size and power dissipation. Moore's law does not hold when reaches the atomic level. So, it becomes necessary to investigate alternative technologies that surpass traditional Complementary Metal Oxide Semiconductor ( CMOS ) technology's physical constraints. Quantum Dot Cellula...

This paper presents comparative study of high-speed, low-power and low voltage full adder circuits. Our approach is based on XOR-XNOR design full adder circuits in a single unit. A low power and high performance 9T full adder cell using a design style called “XOR (3T)” is discussed. The designed circuit commands a high degree of regularity and symmetric higher density than the conventional CMOS...