1 Tamer Çatalkaya, Department of Integrated Circuit Design, Technical University of Braunschweig, Germany, [email protected] Abstract  As an initiative to produce low-cost / low-time Computer Base Training (CBT) material for the education of Chip Design, we introduce our multimedia reference model and our multimedia lab. The reference model enables the cost efficient production, where t...

This paper gives an overview of the main current control strategy for single-phase grid-connected inverters. The model of the power circuit is first discussed. Then, a classification of current control strategy in stationary reference frame follows. This is continued by a discussion of current control structures for single phase grid-connected inverters and the possibilities of implementation i...

We present the design of a nanopower sub-threshold CMOS voltage reference and the measurements performed over a set of more than 70 samples fabricated in 0.18 μm CMOS technology. The circuit provides a temperature-compensated reference voltage of 259 mV with an extremely low line sensitivity of only 0.065% at the price of a less effective temperature compensation. The voltage reference properly...

The calibration and efficiency measurement procedures followed by the PV Devices and Measurements Branch at the Solar Energy Research Institute (SERI) are presented. The use of spectral irradiance measurements to calibrate reference cells used in these measurements has reduced the uncertainty in the calibration number to less than 1%. The use of the spectral mismatch index can reduce the errors...

Snapback breakdown is the second order effect of avalanche breakdown in a device. Snapback occur when the excess supply voltage and high currents created flow through the device and become unstable. These two breakdowns are used to explain the concept of Vertical Impact Ionization MOSFET (IMOS) in its Equivalent Circuit Model. The equivalent circuit model design consists of MOS transistors that...

In this paper, supply, process & temperature compensated, low voltage current reference for CMOS integrated circuits is presented. To minimize production cost, it uses no BJTs, external components or trimming procedures. This circuit is designed in Intel-22nm process and evaluated by computer simulations. The circuit behaviour is supported by theoretical expressions and is in agreement with sim...

This paper presents a low-cost analog test system with diagnosis capabilities. The tester is able to detect faults in any linear circuit by learning a reference circuit behavior in a first step, and comparing this behavior against the output of the circuit under test in a second step. For a faulty circuit, a third step takes place to locate the fault. The diagnosis method consists on injecting ...

A voltage-controlled oscillator (VCO) tolerant to process variations at lower supply voltage was proposed. The circuit consists of an on-chip threshold-voltage-monitoring circuit, a current-source circuit, a bodybiasing control circuit, and the delay cells of the VCO. Because variations in low-voltage VCO frequency are mainly determined by that of the current in delay cells, a current-compensat...

A sub-1V bandgap voltage reference (BGVR) in 0.16μm CMOS is presented that circumvents the trade-off between area and power consumption in conventional sub-1V BGVR topologies. This circuit can be used in systems to generate reference voltages locally, eliminating the conventional relatively large BGVR and its global reference voltage distribution interconnect. The active area is 0.0025mm; at 29...

A 1.8V, IMS/s, 8SdB SNR 2+2 mash ZA modulator with 10.9V reference voltage is realized by using the swing reduction sirnchue. Tlns smcture limits the output swing of all the integrators within half the reference voltage. Thus, low voltage and hgh speed operation is possible with even high reference voltage without degrading the performance of the modulator. The circuit is fabricated in CMOS 0.3...