Residue Number System (RNS) are becoming popular for designing high performance DSP processors because of their ability to offer carry free arithmetic operation. The carry free operations lead to concurrent execution of arithmetic operations on the residues. However in RNS, moduli selection is one of the most important parameter that determines bit efficiency, area, power consumption, speed etc...

In this paper, a novel ROM-less RNS-to-binary converter is proposed, using a new balanced moduli set {22n − 1, 2 + 1, 2 − 3, 2 + 3} for n even. The proposed converter is implemented with a two stage ROM-less approach, which computes the value of X based only in arithmetic operations, without using lookup tables. Experimental results for 24 to 120 bits of Dynamic Range, show that the proposed co...

A systematic graph-based methodology for designing optimal VLSI RNS (Residue Number System) converters from binary system to RNS to quadratic RNS (QRNS) and conversely, using full adders as the basic building block is introduced. The design methodology derives array architectures starting from the algorithm level and ending up with the bit level design. This methodology can be considered as a u...

This paper analyzes the robustness of RSA countermeasures against electromagnetic analysis and collision attacks. The proposed RSA cryptosystem uses residue number systems (RNS) for fast executions of the modular calculi with large numbers. The parallel architecture is protected at arithmetic and algorithmic levels by using the Montgomery Ladder and the Leak Resistant Arithmetic countermeasures...

Field-Programmable Logic (FPL) is on the verge of revolutionizing digital signal processing (DSP) in the manner that programmable DSP microprocessors did nearly two decades ago. While FPL densities and performance have steadily improved to the point where some DSP solutions can be integrated into a single FPL chip, they still have limited use in high-precision high-bandwidth applications. In th...

Even though it has been shown that residue number systems (RNS) provide very fast and reliable arithmetic due to its inherent parallel processing and error correcting capabilities, its use is severely limited to a few applications due to the complexities involved in its conversion circuitry. Moreover, the detection of errors and their correction form an important aspect of any digital design. I...

stored or otherwise retained in a retrieval system or transmitted in any form, on any medium or by any means Abstract The objective of this thesis is to investigate the applicability of Field Programmable Gate Arrays (FPGAs) for residue arithmetic applications. FPGAs are programmable devices that can be directly configured by the end user without the use of an integrated circuit fabrication fac...

This paper is concerned with a new direct-sequence spread-spectrum multiple-access communication system based on the so-called residue number system (RNS) or redundant residue number system (RRNS). The system operates in a multipath fading environment, and a RAKE receiver structure with maximum ratio combining is used for demodulation. Approximations to the error probabilities are given by usin...

This paper presents an implementation of VLSI architecture for Dual Field Residue Arithmetic modular multiplier with less delay based on finite field arithmetic to support all public key cryptographic applications. A new method for incorporating Residue Number System (RNS) and Polynomial Residue Number system (PRNS) in modular multiplication is derived and then implemented VLSI Architecture for...

A dedicated hardware system is developed for a recent class of nonlinear hybrid filters called Order StatisticsRational Hybrid Filters (OSRHF). The performance of these filters is also studied and compared against three effective nonlinear filters from the literature. The application at hand is noise filtering in grey level images. The proposed hardware system uses a residue number system (RNS)...