A fully integrated CMOS wideband Low Noise Amplifier (LNA) operating over 2.3–7 GHz is designed and fabricated using a 0.18 μm CMOS process. The proposed structure is a common sourcecommon source (CS-CS) cascode amplifier with a coupling capacitor. It realizes both low voltage drop at load resistor (Rload) and high gain over 2.3–7 GHz with simultaneous noise and input matching and low power con...

A two-stage CMOS operational amplifier with both, gain-boosting and indirect current feedback frequency compensation performed by means of regulated cascode amplifiers, is presented. By using quasi-floating-gate transistors (QFGT) the supply requirements, the number of capacitors and the size of the compensation capacitors respect to other Miller schemes are reduced. A prototype was fabricated ...

The current mirrors are one of the most important circuits in designing the analog and mixed-mode circuit. A low power and low voltage high-performance CMOS current mirror with optimized input and output resistance are presented in this paper. SPICE simulations confirm the high-performance CMOS current mirror with power supply close to the threshold voltage of the transistor. In this paper, for...

In this paper, a 10-Gb/s inductorless CMOS receiver front end is presented, including a transimpedance amplifier and a limiting amplifier. The transimpedance amplifier incorporates Regulated Cascode (RGC), active-inductor peaking, and intersecting active feedback circuits to achieve a transimpedance gain of 56 dB and a bandwidth of 8.27 GHz with a power dissipation of 35 mW. The limiting amplif...

In this paper, two fully-differential low noise amplifiers based on classical cascode topologies are presented. The first one is enhanced with noise canceling technique and the second one is based on a negative feedback stage. These circuits have been designed to fulfill the lower band of SKA requirements with a 1.5 GHz bandwidth below 2 GHz. Both chips have been implemented using NXP QUBIC4G S...

In this paper the challenge of enhancing the gain and reducing the power requirement of amplifiers, preferably used in biomedical applications is addressed by demonstrating that composite cascode stages, operating in subthreshold/weak inversion regions provide a method of designing a ultra high gain (97dB) and low-power (21μW) op amp with 1.5V power supply. The op amp is designed without compen...

This paper describes a high-gain CMOS low-noise amplifier (LNA) for 2.4/5.2-GHz WLAN applications. The cascode LNA uses an inductor at the common-gate transistor to increase its transconductance equivalently, and therefore it enhances the gain effectively with no additional power consumption. The LNA is matched concurrently at the two frequency bands, and the input/output matching networks are ...

Power consumption is the major issue in VLSI design. In this paper an efficient low power first order sigma delta modulator is designed for oversampled ADC using floating gate folded cascode operational amplifier, in 0.35 μm Technology. Floating gate MOSFET have low power Dissipation hence it is an attractive solution in design of data converters, low voltage op -amp with rail-to-rail input and...