In this paper an effort is made to present a state-of-the-art review of meta-heuristic approaches in solving facility layout problems. Facility layout directly affects the productivity of the industries so it is very important to solve it carefully. There are many approaches, methods and techniques to solve and optimize the layout problem. The current and future trends involving design objectiv...

This paper describes and evaluates the profile-based optimizations in the Compaq C compiler tool chain for Alpha. The optimizations include superblock formation, inlining, commando loop optimization, register allocation, code layout, and switch statement optimization. The optimizations either are extensions of classical optimizations or are restructuring transformations that enable classical op...

This paper deals with the handling of deformable linear objects (DLOs), such as hoses, wires or leaf springs, bases on force/torque sensing. First, we describe the characteristic change of force and moment for all single-contact transitions which may occur between DLO and a rigid polyhedron obstacle. Second, we present data processing algorithms for the automated detection of state transitions ...

Parallel Layout Engines: Synthesis and Optimization of Tree Traversals

This paper introduces ‘treatable’ theories, a large class of first-order theories each having a unique countable recursively saturated model.Important examples of such theories are DIS and DLO. It turns out that resplendency or parameter-free resplendency for such theories is implied by a Σ1(Π1 ThN)-statement. Other results concerning resplendency and Σ1definability are obtained.

This paper introduces performance aspects as a new optimization criteria when generating Gate Matrix Layouts. A new layout model is presented that limits the amount o f parasitic capacitance in signal paths and the resistance in power supply lines. The performance considerations are combined with a new layout s-trate g y that improves circuit performance with little or no area penalty. A n Auto...

This paper introduces performance aspects as a new optimization criteria when generating Gate Matrix Layouts. A new layout model is presented that limits the amount o f parasitic capacitance in signal paths and the resistance in power supply lines. The performance considerations are combined with a new layout s-trate g y that improves circuit performance with little or no area penalty. A n Auto...

1. Abstract In the past few decades plastic layout optimization methods have been largely ignored in favour of those based upon elastic design principles. However, when multiple load cases are present elastic methods are generally computationally expensive and/or are prone to finding local optima. Therefore, they may not at present provide a suitable basis for practical truss layout optimizatio...

Transportation terminal is the key node in transport systems. Efficient terminals can improve operation of passenger transportation networks, adjust the layout of public transportation networks, provide a passenger guidance system, and regulate the development of commercial forms, as well as optimize the assembly and distribution of modern logistic modes, among others. This study aims to clarif...