The design of a fully differential CMOS transconductance operational amplifier is presented. Topology selection, compensation, biasing, and common mode feedback are discussed. Design analysis and simulations are presented demonstrating that the amplifier exceeds the specifications for application in the first stage of a 13-bit pipelined A/D converter, while dissipating an average of 66 mW of po...

This paper deals with well-defined design criteria for ultra low power two stage CMOS operational transconductance amplifiers (OTAs) with simple yet robust implementation in nm dimension. A simple design approach which allows electrical parameters to be univocally related to each circuit element and biasing values for low frequency applications is presented.The operational transconductance ampl...

The design of an integrated CMOS Power Amplifier (PA) for a Jet Propulsion Laboratory (JPL) Synthetic Aperture Radar (SAR) mission is studied. Although there are a number of PA class definitions and published circuits, designing a high efficiency RF PA is still a challenging job. In this thesis, the goal is full integration in Silicon-on-Sapphire (SOS) using on-chip spiral inductors/transformer...

In this paper, we present a 0.7 V low-noise amplifier(LNA) using monolithic transformer feedback to neutralize the gate-drain overlap capacitance of a field-effect transistor(FET). It is a single-ended amplifier implemented in 0.18-μm CMOS technology designing for 5-GHz wireless local-area networks (LANs). This LNA achieves a simulated power gain of 10.84 dB, noise figure(NF) of 2.4 dB, and inp...

In this paper, we present an AC-boosting compensation topology with double pole-zero cancellation (ACBC-DPZ) for a multistage amplifier driving a very large capacitive load. The proposed technique modifies the original AC-boosting compensation (ACBC) topology to increase the power-bandwidth efficiency and reduce the size for the output power transistor and compensation capacitor. Simulation res...

This paper presents a two stage operational transconductance amplifier realized using floating gate MOSFETs in differential inputs. A configuration of two stage operational transconductance amplifier using floating gate MOSFET for low power and low voltage applications is presented. Here we design a two stage operational transconductance amplifier using floating gate MOSFET in HSPICE 180nm CMOS...

At 60GHz, it becomes difficult to achieve a high power added efficiency (PAE) and large output power for CMOS power amplifier (PA). A parallel class-A and AB pseudo Doherty PA is designed in CMOS 65 nm process to obtain a high PAE and large output power. The PA achieves a 9.8-dB gain at 60GHz. The measured large signal results show that a maximum power added efficiency (PAE) of 14.3% and 12.0% ...

The design of a CMOS operational mirrored amplifier (OMA) suitable for high frequency applications is proposed. The CMOS operational mirrored amplifier is developed using class AB operational amplifier and two current mirrors. To obtain a wide bandwidth and high stability, HF feedforward techniques have been used. These techniques made the proposed circuit suitable for continuous – time analog ...

Now-a-days there are many digital and analog circuits that are implemented by CMOS VLSI technology. Currently CMOS VLSI is progressing at fast rate and dominating most of the market. The low voltage VLSI circuits represent the electronic of the future. All electronics products are striving to reduce power consumption, to create more economical and efficient devices. For deep sub-micron CMOS tec...

In this paper design for 1 volt rail to rail supply voltage output of operational amplifier with common mode feedback amplifier has been presented. The circuit has been simulated using BSIM4 model with 50nm CMOS process. The simulation results show that output voltages for the modified operational amplifier are swinging from 10mV to 990mV i.e. between the rail to rail supply voltages (0 to 1V)....