With asynchronous packet arrivals, we nd that, when the number of packet its is close to the fan-in of the crossbar switch, performance of a non-multiport central bu er switch becomes comparable to its multiport counterpart. Assuming the same amount of bu er memory, simulations of oblivious routing on hypercube indicate that split input bu ering outperforms central bu ering, even when dedicated...

The ATOLL System Area Network (SAN) is a low latency interconnect that integrates all required components of a communication system for cluster computing into a single chip. The chip integrates not only four communication devices but also a high performance crossbar. The low latency and the scalability of the ATOLL chip implementation makes it an interesting technology in the area of cluster co...

This paper describes a scalable interconnect for distributed multimedia systems based on crossbar switches. The interconnect is scalable in that it can be used to interconnect a distributed system at different levels. At the lowest level, the interconnect replaces an I/O bus of a workstation in that a switch connects processors and memory with I/O devices. If a large number of devices have to b...

In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implement small fast directory caches in crossbar switches of the interconnect medium to capture and store ownership information as the data flows from the memory module to the requesting processor. Using the stored informatio...

A monolithic multistage interconnection network with minimum two and maximum four stages of cascaded crossbar switches is designed, fabricated and demonstrated. Record ultrahigh data line-rates of 160Gb/s are dynamically switched between paths exploiting the high 43.4dB extinction ratio and optical signal to noise ratio of 41.7dB/0.1nm. KeywordsMonolithic Integration; Optoelectonic Switching

We consider the fundamental delay bounds for scheduling packets in anN×N packet switch operating under the crossbar constraint. Algorithms that make scheduling decisions without considering queue backlog are shown to incur an average delay of at least O(N). We then prove that O(log(N)) delay is achievable with a simple frame based algorithm that uses queue backlog information. This is the best ...

In this paper we present a new approach for building non-blocking optical MINs on building blocks of given size. The network constructed by our approach is self-routing and has Oðlog2 NÞ propagation delay for size N N . The maximum signal loss and crosstalk are compared to those of the widely used crossbar network with the switch complexity of OðN Þ. The proposed approach is a good choice for c...

Maintaining the coherence is becoming one of the most serious problems faced when designing nowadays machines. Initially, this problem was relatively simple when the interconnection network of Symmetric MultiProcessors (SMP) reduced to an atomic bus which simplified the implementation of invalidation coherence protocols. However, atomic busses have been progressively replaced by split busses th...

This paper proposes self-selection pseudo-circuit (SP), a simple and effective approach to increase switch connection reusing rate and improve the network performance. It especially suits the network in which the performance is dominated by the number of hops. In SP scheme, multiple switch connections are allowed to be reserved for one inport, and the flit can reuse the partial switch connectio...

A bipartite concentrator is a single stage sparse crossbar switching device that can connect any m of its n ≥ m inputs to its m outputs possibly without the ability to distinguish their order. Fat-and-slim crossbars were introduced recently to show that bipartite concentrators can be constructed with a minimum number of crosspoints for any number of inputs and outputs. We generalize these graph...