We present simple methods to enhance a recently proposed class of fully adaptive algorithms for fault tolerant wormhole routing These algorithms are based on Duato s theory and are being used in several research projects We show that with three virtual channels per physical channel mulitple rectangular shaped fault blocks can be tolerated in two dimensional meshes There is no restriction on the...

We present a new algorithm for classical simulation of quantum circuits over the Clifford+T gate set. The runtime of the algorithm is polynomial in the number of qubits and the number of Clifford gates in the circuit but exponential in the number of T gates. The exponential scaling is sufficiently mild that the algorithm can be used in practice to simulate medium-sized quantum circuits dominate...

We propose a theoretical protocol to implement multiqubit geometric gates (i.e., the M{\o}lmer-S{\o}rensen gate) using photonic cat-state qubits. These qubits stored in high-$Q$ resonators are promising for hardware-efficient universal quantum computing. Specifically, limit of strong two-photon drivings, phase-flip errors effectively suppressed, leaving only bit-flip error be corrected. Because...

We theoretically show that spontaneously interlayer-coherent bilayer quantum Hall droplets should allow robust and fault-tolerant pseudospin quantum computation in semiconductor nanostructures with voltage-tuned external gates providing qubit control and a quantum Ising Hamiltonian providing qubit entanglement. Using a spin-boson model, we estimate decoherence to be small (approximately 10(-5)).

This paper demonstrates the reversible fault tolerant logic synthesis for the Field Programmable Gate Array (FPGA) and its realization using MOS transistors. Algorithms to design a compact reversible fault tolerant n-to-2 decoder, 4n-to-n multiplexers, a random access memory and a Plessey logic block of the FPGA have been presented. In addition, several lower bounds on the numbers of garbage ou...

—Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient design approaches of fault tolerant carry skip adders (FTCSAs) and compares those designs with the existing ones. Variable...