The development and automatic generation of Built-In Self-Test (BIST) configurations for Atmel AT40K series Field Programmable Gate Arrays (FPGAs) are described. These BIST configurations completely test the programmable logic and routing resources in the core of the FPGA along with the dedicated Random Access Memories (RAMs) dispersed within the array. The BIST configurations are generated usi...

Reconfigurable hardware is a potential technique, which improves the performance of the systems being implemented in it. In this paper, the implementation of an ECG system for detection of abnormalities in real time has been considered using the Partial Reconfiguration technique. The implementation has been done in the Virtex-5 FPGA hardware using Verilog HDL. The performance of the implemented...

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The paper describes a new approach of a flexible run-time system for handling dynamic function reconfiguration in fme-grain Virtex FPGAs, whereas the fulfillment of given real-time constraints are central. Moreover, the detailed evaluation and measurement of the power consumption situation during this dynamic reconfiguration process is essential for realistically quantifying the power loss of f...

This paper shows an area-efficient and high-speed architecture for IPv6 lookup using a parallel index generation unit (IGU). To reduce the size of memory in the IGU, we use a liner transformation and a row-shift decomposition. Also, this paper shows a design method for the parallel IGU. A single memory realization requires O(2) memory size, where n denotes the length of prefix, while the IGU re...

Software radio implementations of beamformers on programmable processors such as digital signal processor (DSP) and field programmable gate array (FPGA) still remain as a challenge for the integration of smart antennas into existing wireless base stations for 3G systems. This study presents the comparison of DSPand FPGA-based implementations of space–code correlator (SCC) beamformer, which is p...

The development and automatic generation of Built-In Self-Test (BIST) configurations for Atmel AT40K series Field Programmable Gate Arrays (FPGAs) are described. These BIST configurations completely test the programmable logic and routing resources in the core of the FPGA along with the dedicated Random Access Memories (RAMs) dispersed within the array. The BIST configurations are generated usi...

Recent strides in programmable logic density, speed and hardware description language (HDL) have empowered the engineer with the ability to implement high-performance digital functionality within field programmable gate array (FPGA). Linear feedback shift resister (LFSR) has become one of the central elements used in testing and self testing of contemporary complex electronic systems like proce...

Hyperspectral imaging is a new technique in remote sensing that generates images with hundreds of spectral bands, at different wavelength channels, for the same area on the surface of the Earth. Although in recent years several efforts have been directed toward the incorporation of parallel and distributed computing in hyperspectral image analysis, there are no standardized architectures for th...