We report the demonstration of an all-optical, bias free and error-free (bit-error-rate ~10(-12)), 10 Gbit/s non-return-to-zero (NRZ) to return-to-zero (RZ) data format conversion using a 7.5 µm diameter III-V-on-silicon microdisk resonator. The device is completely processed in a 200 mm CMOS pilot line. The data format conversion is based on the phenomenon of pulse carving of an NRZ optical da...

In many applications such as TDMA cellular telephone, OFDM, Bluetooth, Satellite communication etc. QPSK digital modulation technique is used due to its higher bandwidth efficiency, higher noise immunity and simpler circuit. Simpler circuit is having lower cost, smaller size and lower power dissipation. In this paper a new circuit for QPSK modulator is designed which improves the area of the ci...

Performance Evaluation Of Fuzzy Logic Controlled Bidirectional DC to DC Convertor Written by Administrator Wednesday, 16 March 2011 08:49 Last Updated Monday, 21 March 2011 07:38 This paper presents the systematic design procedure of fuzzy logic controller for the coupled inductor bidirectional DC-DC converter. The converter contains nonlinear elements making the mathematical model more complex...

In this paper an optimized hardware co-simulation approach is presented to design & implement GSM based digital down convertor for Software Defined Radios. The proposed DDC is implemented using optimal equiripple technique to reduce the resource requirement. A computationally efficient polyphase decomposition structure is used to improve the hardware complexity of the overall design. The propos...

manufacturing industries of agricultural products, which constitute a considerable part of different countries’ economies, are seeking new profitable opportunities by increasing competition at the international level. organizational agility is new method and philosophy of production that seeks to react effectively to the variable and unpredictable environment and to utilize the changes as chanc...

This paper presents 10-bit, 1.5 MS/s, 2.5V, Low Power Pipeline analog to digital converter using capacitor coupling techniques. A capacitance coupling foldedcascode amplifier effectively saves the power consumption of gain stages of ADC in a 0.25 μm CMOS technology. The ADC also achieves Low power Consumption by the sharing an op-amp between two successive pipeline stage further reduction of po...

A new dynamic comparator is presented using modified gain stage followed by latch stage for high speed analog-to-digital converter. The gain stage of proposed comparator is a modified class AB pre-amplifier which makes it suitable for high speed of operation with small delay time and low power. The circuit is simulated in 180 nm process technology using tool Cadence Virtuoso with a supply volta...