In this paper circuit implementations of cellular processor arrays intended for image processing applications are discussed. It is demonstrated that a departure form the standard CNN model can lead to a significant improvement when processing binary (black/white) images. An asynchronous cellular logic array circuit is presented, which is capable of simulating trigger-waves in an excitable mediu...

As the requirement of low power high performance arithmetic circuits, in this paper we introduced a design of new MT-CMOS domino logic and FTL dynamic logic technique to design adder circuit. The MT-MOS transistors reduce the power dissipation by minimizing sub threshold leakage current in domino logic circuits introduced. The MT-NMOS transistor connected in discharging path of output inverter ...